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AD633-EVALZ Fiches technique(PDF) 5 Page - Analog Devices |
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AD633-EVALZ Fiches technique(HTML) 5 Page - Analog Devices |
5 / 16 page Data Sheet AD633 Rev. I | Page 5 of 16 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD633JN/AD633AN 1 1 A 1 10V 1 X1 2 X2 3 Y1 4 Y2 8 +VS 7 W Z 6 5 –VS W = + Z (X1 – X2)(Y1 – Y2) 10V Figure 2. 8-Lead PDIP AD633JR/AD633AR 1 1 1 10V 1 Y1 2 Y2 3 –VS 4 Z 8 X2 7 X1 +VS 6 5 W A W = + Z (X1 – X2)(Y1 – Y2) 10V Figure 3. 8-Lead SOIC Table 4. 8-Lead PDIP Pin Function Descriptions Pin No. Mnemonic Description 1 X1 X Multiplicand Noninverting Input 2 X2 X Multiplicand Inverting Input 3 Y1 Y Multiplicand Noninverting Input 4 Y2 Y Multiplicand Inverting Input 5 −VS Negative Supply Rail 6 Z Summing Input 7 W Product Output 8 +VS Positive Supply Rail Table 5. 8-Lead SOIC Pin Function Descriptions Pin No. Mnemonic Description 1 Y1 Y Multiplicand Noninverting Input 2 Y2 Y Multiplicand Inverting Input 3 −VS Negative Supply Rail 4 Z Summing Input 5 W Product Output 6 +VS Positive Supply Rail 7 X1 X Multiplicand Noninverting Input 8 X2 X Multiplicand Inverting Input |
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