www.ti.com

PACKAGE DISSIPATION RATINGS

(1) (2)

ELECTRICAL CHARACTERISTICS

TPS54310

SLVS412D – DECEMBER 2001 – REVISED FEBRUARY 2007

THERMAL IMPEDANCE

PACKAGE

JUNCTION-TO-AMBIENT

POWER RATING

POWER RATING

POWER RATING

20-Pin PWP with solder

26

°C/W

2.12 W

1.54 W

20-Pin PWP without solder

57.5

°C/W

1.73 W

0.96 W

0.69 W

(1)

For more information on the PWP package, refer to TI technical brief, literature number SLMA002.

(2)

Test board conditions:

1.

3 inch

× 3 inch, 2 layers, Thickness: 0.062 inch

2.

1.5 oz copper traces located on the top of the PCB

3.

1.5 oz copper ground plane on the bottom of the PCB

4.

Ten thermal vias (see recommended land pattern in application section of this data sheet)

(3)

Maximum power dissipation may be limited by overcurrent protection.

T

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY VOLTAGE, VIN

VIN input voltage range

3

6

V

6.2

9.6

Quiescent current

8.4

12.8

mA

Shutdown, SS/ENA = 0 V

1

1.4

UNDER VOLTAGE LOCK OUT

Start threshold voltage, UVLO

2.95

3

V

Stop threshold voltage, UVLO

2.70

2.80

Hysteresis voltage, UVLO

0.14

0.16

V

2.5

µs

BIAS VOLTAGE

Output voltage, VBIAS

2.70

2.80

2.90

V

100

µA

CUMULATIVE REFERENCE

Accuracy

0.882

0.891

0.900

V

REGULATION

0.07

%/V

0.07

0.03

%/A

0.03

OSCILLATOR

SYNC

≤ 0.8 V, RT open

280

350

420

Internally set free-running frequency range

kHz

SYNC

≥ 2.5 V, RT open

440

550

660

RT = 180 k

252

280

308

Externally set free-running frequency range

RT = 100 k

Ω (1% resistor to AGND)

460

500

540

kHz

RT = 68 k

663

700

762

High-level threshold voltage, SYNC

2.5

V

Low-level threshold voltage, SYNC

0.8

V

50

330

700

kHz

0.75

V

1

V

200

ns

Maximum duty cycle

90%

(1)

Specified by design

(2)

Static resistive loads only

(3)

Specified by the circuit used in Figure 10.

3

Submit Documentation Feedback