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ST16C2550IP40 Fiches technique(PDF) 5 Page - Exar Corporation

No de pièce ST16C2550IP40
Description  Up to 4 Mbps with external clock of 64 MHz
Download  37 Pages
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Fabricant  EXAR [Exar Corporation]
Site Internet  http://www.exar.com
Logo EXAR - Exar Corporation

ST16C2550IP40 Fiches technique(HTML) 5 Page - Exar Corporation

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ST16C2550
5
REV. 4.4.1
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
TXRDYB#
-
12
6
O
UART channel B Transmitter Ready (active low). The out-
put provides the TX FIFO/THR status for transmit channel
B. See Table 2. If it is not used, leave it unconnected.
RXRDYB#
-
23
18
O
UART channel B Receiver Ready (active low). This out-
put provides the RX FIFO/RHR status for receive channel
B. See Table 2. If it is not used, leave it unconnected.
MODEM OR SERIAL I/O INTERFACE
TXA
11
13
7
O
UART channel A Transmit Data. If it is not used, leave it
unconnected.
RXA
10
11
5
I
UART channel A Receive Data. Normal receive data
input must idle at logic 1 condition. If it is not used, tie it to
VCC or pull it high via a 100k ohm resistor.
RTSA#
32
36
33
O
UART channel A Request-to-Send (active low) or general
purpose output. If it is not used, leave it unconnected.
CTSA#
36
40
38
I
UART channel A Clear-to-Send (active low) or general
purpose input. This input should be connected to VCC
when not used. This input has no effect on the UART.
DTRA#
33
37
34
O
UART channel A Data-Terminal-Ready (active low) or
general purpose output. If it is not used, leave it uncon-
nected.
DSRA#
37
41
39
I
UART channel A Data-Set-Ready (active low) or general
purpose input. This input should be connected to VCC
when not used. This input has no effect on the UART.
CDA#
38
42
40
I
UART channel A Carrier-Detect (active low) or general
purpose input. This input should be connected to VCC
when not used. This input has no effect on the UART.
RIA#
39
43
41
I
UART channel A Ring-Indicator (active low) or general
purpose input. This input should be connected to VCC
when not used. This input has no effect on the UART.
OP2A#
31
35
32
O
Output Port 2 Channel A - The output state is defined by
the user and through the software setting of MCR[3].
INTA is set to the active mode and OP2A# output to a
logic 0 when MCR[3] is set to a logic 1. INTA is set to the
three state mode and OP2A# to a logic 1 when MCR[3] is
set to a logic 0. See MCR[3]. This output should not be
used as a general output else it will disturb the INTA out-
put functionality. If it is not used at all, leave it uncon-
nected.
TXB
12
14
8
O
UART channel B Transmit Data. If it is not used, leave it
unconnected.
RXB
9
10
4
I
UART channel B Receive Data. Normal receive data
input must idle at logic 1 condition. If it is not used, tie it to
VCC or pull it high via a 100k ohm resistor.
RTSB#
24
27
22
O
UART channel B Request-to-Send (active low) or general
purpose output. If it is not used, leave it unconnected.
Pin Description
NAME
40-PDIP
PIN #
44-PLCC
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION


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