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AD9218BST-RL65 Fiches technique(PDF) 9 Page - Analog Devices

No de pièce AD9218BST-RL65
Description  10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-Digital Converter
Download  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9218BST-RL65 Fiches technique(HTML) 9 Page - Analog Devices

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AD9218
Rev. C | Page 9 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
S1
S2
GND
AINA
AINA
DFS/GAIN
AINB
AINB
REFINA
REFINB
D1A
GND
VDD
D1B
D0A
GND
GND
D0B
GND
VD
REFOUT
VD
VDD
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
AD9218
TOP VIEW
(Not to Scale)
Figure 5. Pin Configuration
Table 7. Pin Function Descriptions
Pin Number
Mnemonic
Description
GND
Ground.
1, 12, 16, 27, 29,
32, 34, 45
2
AINA
Analog Input for Channel A.
A
A
IN
3
Analog Input for Channel A (Complementary).
4
DFS/GAIN
Data Format Select and Analog Input Gain Mode. Low = offset binary output available, 1 V p-p supported;
high = twos complement output available, 1 V p-p supported; floating = offset binary output available,
2 V p-p supported; set to V
= twos complement output available, 2 V p-p supported.
REF
5
REFINA
Reference Voltage Input for Channel A.
6
REFOUT
Internal Reference Voltage.
7
REFINB
Reference Voltage Input for Channel B.
8
S1
User Select No. 1. See Table 6.
9
S2
User Select No. 2. See Table 6.
10
B
A
IN
Analog Input for Channel B (Complementary).
11
AINB
Analog Input for Channel B.
13, 30, 31, 48
VD
Analog Supply (3 V).
14
ENCB
Clock Input for Channel B.
15, 28, 33, 46
VDD
Digital Supply (2.5 V to 3.6 V).
17 to 26
D9 to D0
B
B
Digital Output for Channel B (D9 = MSB).
B
35 to 44
D0A to D9A
Digital Output for Channel A (D9A = MSB).
47
ENCA
Clock Input for Channel A.


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