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AD7730BRU-REEL Fiches technique(PDF) 24 Page - Analog Devices |
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AD7730BRU-REEL Fiches technique(HTML) 24 Page - Analog Devices |
24 / 53 page AD7730/AD7730L –24– ANALOG INPUT Analog Input Channels The AD7730 contains two differential analog input channels, a primary input channel, AIN1, and a secondary input channel, AIN2. The input pairs provide programmable gain, differential channels which can handle either unipolar or bipolar input signals. It should be noted that the bipolar input signals are referenced to the respective AIN(–) input of the input pair. The secondary input channel can also be reconfigured as two digital output port bits. A two-channel differential multiplexer switches one of the two input channels to the on-chip buffer amplifier. This multiplexer is controlled by the CH0 and CH1 bits of the Mode Register. When the analog input channel is switched, the RDY output goes high and the settling time of the part must elapse before a valid word from the new channel is available in the Data Regis- ter (indicated by RDY going low). Buffered Inputs The output of the multiplexer feeds into a high impedance input stage of the buffer amplifier. As a result, the analog inputs can handle significant source impedances. This buffer amplifier has an input bias current of 50 nA (CHP = 1) and 60 nA (CHP = 0). This current flows in each leg of the analog input pair. The offset current on the part is the difference between the input bias on the legs of the input pair. This offset current is less than 10 nA (CHP = 1) and 30 nA (CHP = 0). Large source resis- tances result in a dc offset voltage developed across the source resistance on each leg, but matched impedances on the analog input legs will reduce the offset voltage to that generated by the input offset current. Analog Input Ranges The absolute input voltage range is restricted to between AGND + 1.2 V to AVDD – 0.95 V, which also places restrictions on the common-mode range. Care must be taken in setting up the common-mode voltage and input voltage range so these limits are not exceeded, otherwise there will be a degradation in linearity performance. In some applications, the analog input range may be biased either around system ground or slightly below system ground. In such cases, the AGND of the AD7730 must be biased negative with respect to system ground so the analog input voltage does not go within 1.2 V of AGND. Care should taken to ensure that the differential between either AVDD or DVDD and this biased AGND does not exceed 5.5 V. This is discussed in more detail in the Applications section. Programmable Gain Amplifier The output from the buffer amplifier is summed with the output of the 6-bit Offset DAC before it is applied to the input of the on-chip programmable gain amplifier (PGA). The PGA can handle four different unipolar input ranges and four bipolar ranges. With the HIREF bit of the Mode Register at 0 and a +2.5 V reference (or the HIREF bit at 1 and a +5 V reference), the unipolar ranges are 0 mV to +10 mV, 0 mV to +20 mV, 0 mV to +40 mV, and 0 mV to +80 mV, while the bipolar ranges are ±10 mV, ±20 mV, ±40 mV and ±80 mV. These are the nominal ranges that should appear at the input to the on-chip PGA. Offset DAC The purpose of the Offset DAC is to either add or subtract an offset so the input range at the input to the PGA is as close as possible to the nominal. If the output of the 6-bit Offset DAC is 0 V, the differential voltage ranges that appear at the analog input to the part will also appear at the input to the PGA. If, however, the Offset DAC has an output voltage other than 0 V, the input range to the analog inputs will differ from that applied to the input of the PGA. The Offset DAC has five magnitude bits and one sign bit. The sign bit determines whether the value loaded to the five magni- tude bits is added to or subtracted from the voltage at the ana- log input pins. Control of the Offset DAC is via the DAC Register which is discussed previously in the On-Chip Registers section. With a 5 V reference applied between the REF IN pins, the resolution of the Offset DAC is 2.5 mV with a range that allows addition or subtraction of 77.5 mV. With a 2.5 V refer- ence applied between the REF IN pins, the resolution of the Offset DAC is 1.25 mV with a range that allows addition or subtraction of 38.75 mV. Following is an example of how the Offset DAC works. If the differential input voltage range the user had at the analog input pins was +20 mV to +30 mV, the Offset DAC should be pro- grammed to subtract 20 mV of offset so the input range to the PGA is 0 mV to +10 mV. If the differential input voltage range the user had at the analog input pins was –60 mV to +20 mV, the Offset DAC should be programmed to add 20 mV of offset so the input range to the PGA is ±40 mV. Bipolar/Unipolar Inputs The analog inputs on the AD7730 can accept either unipolar or bipolar input voltage ranges. Bipolar input ranges do not imply that the part can handle negative voltages with respect to system ground on its analog inputs unless the AGND of the part is also biased below system ground. Unipolar and bipolar signals on the AIN(+) input are referenced to the voltage on the respective AIN(–) input. For example, if AIN(–) is +2.5 V and the AD7730 is configured for an analog input range of 0 to +10 mV with no DAC offset correction, the input voltage range on the AIN(+) input is +2.5 V to +2.51 V. Similarly, if AIN(–) is +2.5 V and the AD7730 is configured for an analog input range of ±80 mV with no DAC offset correction, the analog input range on the AIN(+) input is +2.42 V to +2.58 V (i.e., 2.5 V ± 80 mV). Bipolar or unipolar options are chosen by programming the B/U bit of the Mode Register. This programs the selected channel for either unipolar or bipolar operation. Programming the chan- nel for either unipolar or bipolar operation does not change any of the input signal conditioning; it simply changes the data output coding and the points on the transfer function where calibrations occur. When the AD7730 is configured for unipolar operation, the output coding is natural (straight) binary with a zero differential voltage resulting in a code of 000 . . . 000, a midscale voltage resulting in a code of 100 . . . 000 and a full- scale input voltage resulting in a code of 111 . . . 111. When the AD7730 is configured for bipolar operation, the coding is offset binary with a negative full scale voltage resulting in a code of 000 . . . 000, a zero differential voltage resulting in a code of 100 . . . 000 and a positive full scale voltage resulting in a code of 111 . . . 111. REV. B |
Numéro de pièce similaire - AD7730BRU-REEL |
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Description similaire - AD7730BRU-REEL |
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