TCP−3027H

http://onsemi.com

5

Wafer Level Chip Scale Package (WLCSP) Layout and Dimensional Information

Figure 7. WLCSP Pin Markers and Dimensions

A2

D1

C2

2X 0.104 mm (Typ)

(Copper Pillar)

2X 0.069 mm (Typ)

(Copper Pillar)

RF Pillars

0.104 mm (Typ)

RF Pillars

0.069 mm (Typ)

C1

A1

B3

C3

Bottom View

(Pillars Up)

Side View

B1

B4

D2

Top View

(Pillars Down)

Note:

2X means 2 sites with the specific value

3X means 3 sites with the specific value

4X means 4 sites with the specific value

D3

(Copper Pillar

Height)

RF1 RF2

B2

RF1 RF2

RF1 RF2

N/C Bias

Table 3. PACKAGE DIMENSIONS

(All dimensions are in millimeters)

WLCSP*

DIM

Nominal

Max

Device

8P

A1

0.879

1.2, 2.7 pF

10P

A1

1.029

3.3, 3.9 pF

12P

A1

1.179

4.7, 5.6, 6.8, 8.2 pF

14P

A1

1.329

ALL

A2

0.722

ALL

B1

0.460

ALL

B2

0.150

ALL

B3

0.300

ALL

B4

0.130

ALL

C1

0.148

ALL

C2

0.425

ALL

C3

0.130

ALL

D1

0.530

ALL

D2

0.081

*Total number of pillars

Figure 8. Recommended Pad Layout

Note:

0.9 mm pad layout is standard for all products. Shorter pad

layouts can be considered for smaller products.