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DM74LS83 Fiches technique(PDF) 1 Page - Fairchild Semiconductor |
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DM74LS83 Fiches technique(HTML) 1 Page - Fairchild Semiconductor |
1 / 5 page © 2000 Fairchild Semiconductor Corporation DS006378 www.fairchildsemi.com August 1986 Revised March 2000 DM74LS83A 4-Bit Binary Adder with Fast Carry General Description These full adders perform the addition of two 4-bit binary numbers. The sum ( ∑) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial look- ahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion. Features s Full-carry look-ahead across the four bits s Systems achieve partial look-ahead performance with the economy of ripple carry s Typical add times Two 8-bit words 25 ns Two 16-bit words 45 ns s Typical power dissipation per 4-bit adder 95 mW Ordering Code: Connection Diagram Order Number Package Number Package Description DM74LS83AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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