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6

DM74AS648 Switching Characteristics

Note 7: These parameters are measured with the internal output state of the storage register opposite to that of the bus input.

Symbol

Parameter

Conditions

From

To

Min

Max

Units

(Input)

(Output)

Maximum Clock Frequency

90

MHz

Propagation Delay Time

28.5

ns

LOW-to-HIGH Level Output

CAB or CBA

A or B

Propagation Delay Time

29

ns

HIGH-to-LOW Level Output

Propagation Delay Time

28

ns

LOW-to-HIGH Level Output

A or B

B or A

Propagation Delay Time

17

ns

HIGH-to-LOW Level Output

Propagation Delay Time

211

ns

LOW-to-HIGH Level Output

SBA or SAB

A or B

Propagation Delay Time

29

ns

HIGH-to-LOW Level Output

(Note 7)

Output Enable Time

29

ns

to HIGH Level Output

Output Enable Time

315

ns

to LOW Level Output

Enable G

A or B

Output Disable Time

29

ns

from HIGH Level Output

Output Disable Time

29

ns

from LOW Level Output

Output Enable Time

316

ns

to HIGH Level Output

Output Enable Time

318

ns

to LOW Level Output

DIR

A or B

Output Disable Time

210

ns

from HIGH Level Output

Output Disable Time

210

ns

from LOW Level Output