Moteur de recherche de fiches techniques de composants électroniques |
|
ACE1202EM8X Fiches technique(PDF) 27 Page - Fairchild Semiconductor |
|
ACE1202EM8X Fiches technique(HTML) 27 Page - Fairchild Semiconductor |
27 / 39 page 27 www.fairchildsemi.com ACE1202 Product Family Rev. B.1 Figure 24: HBC signals for one byte message in PWM format ¡ OCFLAG SYNC Period ShiftCLK Bit 7 DAT0 G2/G5 Output IR/RF CLOCK Condition: BPSEL = 0x12 [ "1", " 0 " = 3 * IR/RF Clocks] DAT0 = 0x52 No. bit to encode = 8 (HBCNTRL = XXXX0111b) "0" "1" "1" "0" "1" "0" "0" "0" START/STOP TXBUSY "0" Figure 25: Sending series of encoded messages OCFLAG ShiftCLK Bit 7 DAT0 G2/G5 Output IR/RF CLOCK Conditions: BPSEL = 0x12 [ "1", " 0 " = 3 * IR/RF Clocks] DAT0 = 0x52 , 0x92 No. bit to encode = 8 (HBCNTRL = XXXX0111b) START/STOP TXBUSY "0" "1" "1" "0" "1" "0" "0" "0" "1" "0" "1" "0" "0" "0" "0" "1" Software must set the START bit while OCFLAG is set in order to send another message without introducing a delay. STOP bit clear, transmission ends. "0" SYNC Period |
Numéro de pièce similaire - ACE1202EM8X |
|
Description similaire - ACE1202EM8X |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |