74VCX162601MTD datasheet(5/8 Pages) FAIRCHILD

No de pièce	74VCX162601MTD

Description	Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26廓 Series Resistors in the B-Port Outputs

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Fabricant	FAIRCHILD [Fairchild Semiconductor]

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AC Electrical Characteristics (Note 11)

Note 11: For CL = 50pF, add approximately 300ps to the AC maximum specification.

Note 12: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

Symbol

Parameter

TA = −40°C to +85°C, CL = 30 pF, RL = 500Ω

Units

VCC = 3.3V ± 0.3V

VCC = 2.5 ± 0.2V

VCC = 1.8V ± 0.15V

Min

Max

Min

Max

Min

Max

fMAX

Maximum Clock Frequency

250

200

100

MHz

tPHL, tPLH

Propagation Delay

B to A

0.8

2.9

1.0

3.5

1.5

7.0

ns

tPHL, tPLH

Propagation Delay

A to B

0.8

3.8

1.0

4.6

1.5

9.2

ns

tPHL, tPLH

Propagation Delay

Clock to A

0.8

3.5

1.0

4.4

1.5

8.8

ns

tPHL, tPLH

Propagation Delay

Clock to B

0.8

4.4

1.0

5.5

1.5

9.8

ns

tPHL, tPLH

Propagation Delay

LEBA to A

0.8

3.5

1.0

4.4

1.5

8.8

ns

tPHL, tPLH

Propagation Delay

LEAB to B

0.8

4.4

1.0

5.8

1.5

9.8

ns

tPZL, tPZH

Output Enable Time

OEBA to A

0.8

3.8

1.0

4.9

1.5

9.8

ns

tPZL, tPZH

Output Enable Time

OEAB to B

0.8

4.3

1.0

5.9

1.5

9.8

ns

tPLZ, tPHZ

Output Disable Time

OEBA to A

0.8

3.7

1.0

4.2

1.5

7.6

ns

tPLZ, tPHZ

Output Disable Time

OEAB to B

0.8

4.3

1.0

4.9

1.5

8.8

ns

tS

Setup Time

1.5

2.5

ns

tH

Hold Time

1.0

ns

tW

Pulse Width

1.5

4.0

ns

tOSHL

Output to Output

0.5

0.75

ns

tOSLH

Skew (Note 12)

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