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74LCX27SJ Fiches technique(PDF) 1 Page - Fairchild Semiconductor |
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74LCX27SJ Fiches technique(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2001 Fairchild Semiconductor Corporation DS500454 www.fairchildsemi.com February 2001 Revised February 2001 74LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs General Description The LCX27 contains three 3-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys- tems to 3V systems. The 74LCX27 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs s 2.3V–3.6V VCC specifications provided s 4.9 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s ±24 mA output drive (V CC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Truth Table On = An + Bn + Cn H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Order Number Package Number Package Description 74LCX27M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX27MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description An, Bn, Cn Inputs On Outputs Inputs Output An Bn Cn On HX X L XHX L XX H L LL L H |
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