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X0203MA5BL2 Fiches technique(PDF) 3 Page - STMicroelectronics |
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X0203MA5BL2 Fiches technique(HTML) 3 Page - STMicroelectronics |
3 / 5 page 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 P (W) 360 O = 180 o = 120 o =90 o =60 o =30 o DC I (A) T(AV) Fig.1 : Maximum average power dissipation ver- sus average on-state current. 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 I (A) T(AV) = 180 o DC Tlead ( C) o Fig.3 : Average on-state current versus lead tem- perature. Igt Ih 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -40 -20 0 20 40 60 80 100 120 140 Igt[Tj] Igt[Tj=25 C] o Ih[Tj] Ih[Tj=25 C] o Tj( C) o Fig.5 : Relative variation of gate trigger current and holding current versus junction temperature. 0 20 40 60 80 100 120 140 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -50 -70 -90 -110 P (W) Tlead ( C) o Tamb ( C) o Rth( j-l) Rth( j-a) Fig.2 : Correlation between maximum average power dissipation and maximum allowable tem- perature (Tamb and Tlead). 1E-3 1E-2 1E-1 1 E+0 1 E+1 1E +2 5 E+2 0.01 0.10 1.00 Zth(j-a)/Rth(j-a) tp (s ) Fig.4 : Relative variation of thermal impedance junction to ambient versus pulse duration. 1 10 100 100 0 0 5 10 15 20 25 Tj initial = 25 C o Number of cycles I (A) TSM Fig.6 : Non repetitive surge peak on-state current versus number of cycles. ® X02xxxA 3/5 |
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