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ADDC02828SAKV Fiches technique(PDF) 11 Page - Analog Devices |
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ADDC02828SAKV Fiches technique(HTML) 11 Page - Analog Devices |
11 / 16 page ADDC02828SA REV. 0 –11– For the power delivery to be efficient, it is required that RS << RN. For the system to be stable, however, the following relationship must hold: CP|RN|> (LS + LP ) RS or RS > (LS + LP ) CP|RN| Notice from this result that if (LS + LP) is too large, or if RS is too small, the system might be unstable. This condition would first be observed at low input line and full load since the abso- lute value of RN is smallest at this operating condition. If an instability results, and it cannot be corrected by changing LS or RS (such as during the MIL-STD-461D tests) due to the LISN requirement, one possible solution is to place a capacitor across the input of the POL converter. Another possibility is to place a small resistor in series with this extra capacitor. The analysis so far has assumed the source of power was a volt- age source (e.g., a battery) with some source impedance. In some cases, this source may be the output of a front-end (FE) converter. Although each FE converter is different, a model for a typical one would have an LC output filter driven by a voltage source whose value was determined by the feedback loop. The LC filter usually has a high Q, so the compensation of the feedback loop is chosen to help dampen any oscillations that result from load transients. In effect, the feedback loop adds “positive resistance” to the LC network. When the POL converter is connected to the output of this FE converter, the POL’s “negative resistance” counteracts the effects of the FE’s “positive resistance” offered by the feedback loop. Depending on the specific details, this might simply mean that the FE converter’s transient response is slightly more oscil- latory, or it may cause the entire system to be unstable. For the ADDC02828SA, LP is approximately 1 µH and C P is approximately 4 µF. Figure 8 shows a more accurate depiction of the input impedance of the converter as a function of fre- quency. The negative resistance is, itself, a very good incremen- tal model for the power state of the converter for frequencies into the several kHz range. NAVMAT DERATING NAVMAT is a Navy power supply reliability manual that is frequently cited by specifiers of power supplies. A key section of NAVMAT P4855-1A discusses guidelines for derating designs and their components. The two key derating criteria are voltage derating and power derating. Voltage derating is done to reduce the possibility of electrical breakdown, whereas power derating is done to maintain the component material below a specified maximum temperature. While power deratings are typically stated in terms of current limits (e.g., derate to x% of maximum rating), NAVMAT also specifies a maximum junction tem- perature of the semiconductor devices in a power supply. The NAVMAT component deratings applicable to the ADDC02828SA are as follows: Resistors 80% voltage derating 50% power derating Capacitors 50% voltage and ripple voltage derating 70% ripple current derating Transformers and Inductors 60% continuous voltage and current derating 90% surge voltage and current derating 20 °C less than rated core temperature 30 °C below insulation rating for hot spot temperature 25% insulation breakdown voltage derating 40 °C maximum temperature rise Transistors 50% power derating 60% forward current (continuous) derating 75% voltage and transient peak voltage derating 110 °C maximum junction temperature Diodes (Switching, General Purpose, Rectifiers) 70% current (surge and continuous) derating 65% peak inverse voltage derating 110 °C maximum junction temperature Diodes (Zeners) 70% surge current derating 60% continuous current derating 50% power derating 110 °C maximum junction temperature Microcircuits (Linears) 70% continuous current derating 75% signal voltage derating 110 °C maximum junction temperature The ADDC02828SA can meet all the derating criteria listed above. However, there are a few areas of the NAVMAT deratings where meeting the guidelines unduly sacrifices performance of the circuit. Therefore, the standard unit makes the following exceptions. Common-Mode EMI Filter Capacitors: The standard supply uses 500 V capacitors to filter common-mode EMI. NAVMAT guidelines would require 1000 V capacitors to meet the 50% voltage derating (500 V dc input to output isolation), resulting in less common-mode capacitance for the same space. In typical electrical power supply systems, where the load ground is eventually connected to the source ground, common- mode voltages never get near the 500 V dc rating of the standard supply. Therefore, a lower voltage rating capacitor (500 V) was chosen to fit more capacitance in the same space in order to better meet the conducted emissions requirement of MIL- STD-461D (CE102). For those applications requiring 250 V or less of isolation from input to output, the present designs would meet NAVMAT guidelines. Switching Transistors: 100 V MOSFETs are used in the standard unit to switch the primary side of the transformers. Their nominal off-state voltage meets the NAVMAT derating guidelines. When the MOSFETs are turned off, however, mo- mentary spikes occur that reach 100 V. The present generation of MOSFETs are rated for repetitive avalanche, a condition that was not considered by the NAVMAT deratings. In the worst case condition, the energy dissipated during avalanche is 1% of the device’s rated repetitive avalanche energy. To meet the NAVMAT derating, 200 V MOSFETs could be used. The 100 V MOSFETs are used instead for their lower on-state resis- tance, resulting in higher efficiency for the power supply. NAVMAT Junction Temperatures: The two types of power deratings (current and temperature) can be independent of one another. For instance, a switching diode can meet its derating |
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