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AD8361-EVAL Fiches technique(PDF) 9 Page - Analog Devices |
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AD8361-EVAL Fiches technique(HTML) 9 Page - Analog Devices |
9 / 16 page AD8361 –9– REV. A CIRCUIT DESCRIPTION The AD8361 is an rms-responding (mean power) detector pro- viding an approach to the exact measurement of RF power that is basically independent of waveform. It achieves this function through the use of a proprietary technique in which the outputs of two identical squaring cells are balanced by the action of a high-gain error amplifier. The signal to be measured is applied to the input of the first squaring cell, which presents a nominal (LF) resistance of 225 Ω between the pin RFIN and COMM (connected to the ground plane). Since the input pin is at a bias voltage of about 0.8 V above ground, a coupling capacitor is required. By making this an external component, the measurement range may be extended to arbitrarily low frequencies. The AD8361 responds to the voltage, VIN, at its input, by squaring this voltage to generate a current proportional to VIN squared. This is applied to an internal load resistor, across which is con- nected a capacitor. These form a low-pass filter, which extracts the mean of VIN squared. Although essentially voltage-responding, the associated input impedance calibrates this port in terms of equivalent power. Thus 1 mW corresponds to a voltage input of 447 mV rms. In the Application section it is shown how to match this input to 50 Ω. The voltage across the low-pass filter, whose frequency may be arbitrarily low, is applied to one input of an error-sensing amplifier. A second identical voltage-squaring cell is used to close a negative feedback loop around this error amplifier. This second cell is driven by a fraction of the quasi-dc output voltage of the AD8361. When the voltage at the input of the second squaring cell is equal to the rms value of VIN, the loop is in a stable state, and the output then represents the rms value of the input. The feedback ratio is nominally 0.133, making the rms-dc conversion gain ×7.5, that is VOUT = 7.5 × VIN rms By completing the feedback path through a second squaring cell, identical to the one receiving the signal to be measured, several benefits arise. First, scaling effects in these cells cancel; thus, the overall calibration may be accurate, even though the open-loop response of the squaring cells taken separately need not be. Note that in implementing rms-dc conversion, no reference voltage enters into the closed-loop scaling. Second, the tracking in the responses of the dual cells remains very close over tempera- ture, leading to excellent stability of calibration. The squaring cells have very wide bandwidth with an intrinsic response from dc to microwave. However, the dynamic range of such a system is fairly small, due in part to the much larger dynamic range at the output of the squaring cells. There are practical limitations to the accuracy with which very small error signals can be sensed at the bottom end of the dynamic range, arising from small random offsets; these set the limit to the attainable accuracy at small inputs. On the other hand, the squaring cells in the AD8361 have a “Class-AB” aspect; the peak input is not limited by their quiescent bias condition, but is determined mainly by the eventual loss of square-law conformance. Consequently, the top end of their response range occurs at a fairly large input level (about 700 mV rms) while preserving a reasonably accurate square-law response. The maximum usable range is, in practice, limited by the output swing. The rail-to-rail output stage can swing from a few millivolts above ground to less than 100 mV below the supply. An example of the output induced limit: given a gain of 7.5 and assuming a maximum output of 2.9 V with a 3 V supply; the maximum input is (2.9 V rms)/7.5 or 390 mV rms. Filtering An important aspect of rms-dc conversion is the need for averaging (the function is root-MEAN-square). For complex RF waveforms such as occur in CDMA, the filtering provided by the on-chip low-pass filter, while satisfactory for CW signals above 100 MHz, will be inadequate when the signal has modulation components that extend down into the kilohertz region. For this reason, the FLTR pin is provided: a capacitor attached between this pin and VPOS can extend the averaging time to very low frequencies. Offset An offset voltage can be added to the output (when using the micro_SOIC version) to allow the use of A/D converters whose range does not extend down to ground. However, accuracy at the low end will be degraded because of the inherent error in this added voltage. This requires that the pin IREF (internal reference) should be tied to VPOS and SREF (supply reference) to ground. In the IREF mode, the intercept is generated by an internal reference cell, and is a fixed 350 mV, independent of the supply voltage. To enable this intercept, IREF should be open-circuited, and SREF should be grounded. In the SREF mode, the voltage is provided by the supply. To implement this mode, tie IREF to VPOS and SREF to VPOS. The offset is then proportional to the supply voltage, and is 400 mV for a 3 V supply and 667 mV for a 5 V supply. USING THE AD8361 Basic Connections Figures 32, 33, and 34 show the basic connections for the micro_SOIC version AD8361 in its three operating modes. In all modes, the device is powered by a single supply of between 2.7 V and 5.5 V. The VPOS pin is decoupled using 100 pF and 0.01 µF capacitors. The quiescent current of 1.1 mA in operating mode can be reduced to 1 µA by pulling the PWDN pin up to VPOS. A 75 Ω external shunt resistance combines with the ac-coupled input to give an overall broadband input impedance near 50 Ω. Note that the coupling capacitor must be placed between the in- put and the shunt impedance. Input impedance and input coupling are discussed in more detail below. The input coupling capacitor combines with the internal input resistance (Figure 13) to give a high-pass corner frequency given by the equation f CR dB CIN 3 1 2 = ×× π |
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