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AD5322BRM Fiches technique(PDF) 10 Page - Analog Devices

No de pièce AD5322BRM
Description  2.5 V to 5.5 V, 230 uA Dual Rail-to-Rail, Voltage Output 8-/10-/12-Bit DACs
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

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REV. 0
AD5302/AD5312/AD5322
–10–
GENERAL DESCRIPTION
The AD5302/AD5312/AD5322 are dual resistor string DACs
fabricated on a CMOS process with resolutions of 8, 10 and 12
bits, respectively. They contain reference buffers, output buffer
amplifiers and are written to via a 3-wire serial interface. They
operate from single supplies of +2.5 V to +5.5 V and the output
buffer amplifiers provide rail-to-rail output swing with a slew
rate of 0.7 V/
µs. Each DAC is provided with a separate refer-
ence input, which may be buffered to draw virtually no current
from the reference source, or unbuffered to give a reference
input range from GND to VDD. The devices have three program-
mable power-down modes, in which one or both DACs may be
turned off completely with a high impedance output, or the
output may be pulled low by an on-chip resistor.
Digital-to-Analog Section
The architecture of one DAC channel consists of a reference
buffer and a resistor-string DAC followed by an output buffer
amplifier. The voltage at the VREF pin provides the reference
voltage for the DAC. Figure 26 shows a block diagram of the
DAC architecture. Since the input coding to the DAC is straight
binary, the ideal output voltage is given by:
V
VD
OUT
REF
N
=
×
2
where
D = decimal equivalent of the binary code that is loaded to the
DAC register;
0–255 for AD5302 (8 Bits)
0–1023 for AD5312 (10 Bits)
0–4095 for AD5322 (12 Bits).
N = DAC resolution.
RESISTOR
STRING
OUTPUT BUFFER
AMPLIFIER
INPUT
REGISTER
DAC
REGISTER
SWITCH
CONTROLLED
BY CONTROL
LOGIC
REFERENCE
BUFFER
VOUTA
VREFA
Figure 26. Single DAC Channel Architecture
Resistor String
The resistor string section is shown in Figure 27. It is simply a
string of resistors, each of value R. The digital code loaded to
the DAC register determines at what node on the string the
voltage is tapped off to be fed into the output amplifier. The
voltage is tapped off by closing one of the switches connecting
the string to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
R
R
R
R
R
TO OUTPUT
AMPLIFIER
Figure 27. Resistor String
DAC Reference Inputs
There is a reference input pin for each of the two DACs. The
reference inputs are buffered but can also be configured as un-
buffered. The advantage with the buffered input is the high
impedance it presents to the voltage source driving it.
However, if the unbuffered mode is used, the user can have a
reference voltage as low as GND and as high as VDD since there
is no restriction due to headroom and foot room of the reference
amplifier.
If there is a buffered reference in the circuit (e.g., REF192)
there is no need to use the on-chip buffers of the AD5302/
AD5312/AD5322. In unbuffered mode the impedance is still
large (180 k
Ω per reference input).
The buffered/unbuffered option is controlled by the BUF bit in
the control word (see Serial Interface section for a description of
the register contents).
Output Amplifier
The output buffer amplifier is capable of generating output
voltages to within 1 mV of either rail which gives an output
range of 0.001 V to VDD – 0.001 V when the reference is VDD. It
is capable of driving a load of 2 k
Ω in parallel with 500 pF to
GND and VDD. The source and sink capabilities of the output
amplifier can be seen in Figure 14.
The slew rate is 0.7 V/
µs with a half-scale settling time to
±0.5 LSB (at 8 bits) of 6 µs. See Figure 19.
POWER-ON RESET
The AD5302/AD5312/AD5322 are provided with a power-on
reset function, so that they power up in a defined state. The
power-on state is:
– Normal operation.
– Reference inputs unbuffered.
– Output voltage set to 0 V.
Both input and DAC registers are filled with zeros and remain
so until a valid write sequence is made to the device. This is
particularly useful in applications where it is important to know
the state of the DAC outputs while the device is powering up.


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