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AD421BN Fiches technique(PDF) 2 Page - Analog Devices

No de pièce AD421BN
Description  Loop-Powered 4 mA to 20 mA DAC
Download  14 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD421BN Fiches technique(HTML) 2 Page - Analog Devices

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DAC SPECIFICATIONS
Parameter
B Versions
2
Units
Conditions/Comments
ACCURACY
Resolution
16
Bits
Monotonicity
16
Bits min
Integral Nonlinearity
±0.01
% of FS max
FS = Full-Scale Output Current
Offset (4 mA) @ +25
°C4
±0.1
% of FS max
VCC = 5 V
Offset Drift
±25
ppm of FS/
°C max Includes On-Chip Reference Drift
Total Output Error (20 mA) @ +25
°C4
±0.2
% of FS max
VCC = 5 V
Total Output Drift
±50
ppm of FS/
°C max Includes On-Chip Reference Drift
VCC Supply Sensitivity
50
nA/mV max
25 nA/mV Typical
VOLTAGE REFERENCE
REF OUT2
Output Voltage
2.49/2.51
V min/V max
2.5 V Nominal
Drift
±40
ppm/
°C max
20 ppm/
°C Typical from –40°C to +25°C and
–2.5 ppm/
°C Typical from +25°C to +85°C
Externally Available Current
0.5
mA min
VCC Supply Sensitivity
150
µV/V max
15
µV/V Typical
Output Impedance
3
Ω typ
Noise (0.1 Hz–10 Hz)
6
µV (p-p) typ
REF OUT1
Output Voltage
1.24/1.26
V min/V max
1.25 V Nominal, 100 k
Ω Load to COM5
Drift
±50
ppm/
°C max
20 ppm/
°C Typical from –40°C to +25°C and
2 ppm/
°C Typical from +25°C to +85°C
Externally Available Current
0.5
mA min
VCC Supply Sensitivity
150
µV/V max
15
µV/V Typical
Output Impedance
3
Ω typ
Noise (0.1 Hz–10 Hz)
4
µV (p-p) typ
REF IN
Input Resistance
40
k
Ω typ
DIGITAL INPUTS
VIH (Logic 1)
0.75
× V
CC
V min
VIL (Logic 0)
0.25
× V
CC
V max
IIH
±10
µA max
VIN = VCC
IIL
±10
µA max
VIN = 0 V
Data Coding
Binary
Data Rate
10
Mbps max
POWER SUPPLIES
Operating Range
+2.95 to +5.05
V min to V max
Functional to 7 V
Quiescent Current
@ VCC = 3 V
650
µA max
475
µA Typical
@ VCC = 5 V
750
µA max
575
µA Typical
NOTES
1The DN25D is available from Supertex, Inc., 1350 Bordeaux Drive, Sunnyvale, CA 94089.
2Temperature range is –40
°C to +85°C.
3The max current loop voltage compliance is determined by the pass transistor breakdown voltage and is 350 V for the DN25D.
4With V
CC = 3 V, the transfer function shifts negative by typically 0.25%; a 16 k
Ω resistor connected between COM and LOOPRTN will approximately compensate for the V
CC
supply sensitivity in moving from 5 V to 3 V by skewing the gain of the AD421.
5100 k
Ω resistor only required if this reference is being used in application circuits.
Specifications subject to change without notice.
AD421–LOOP-POWERED SPECIFICATIONS
Parameter
B Versions
2
Units
Conditions/Comments
OUTPUT CHARACTERISTICS
Current Loop Voltage Compliance
3
VCC + 2
V min
350
V max
DN25D Breakdown Voltage
Full-Scale Settling Time
8
ms typ
Settling Time to
±0.1%, C1 = C2 = 10 nF, C3 = 3.3 nF
Output Impedance
25
M
Ω typ
AC Loop Voltage Sensitivity
2
µA/V typ
1200 Hz to 2200 Hz
VOLTAGE REGULATOR
Output Voltage (VCC)
3 V Mode
2.95/3.05
V min/V max
3 V Nominal. LV Pin Connected to VCC
3.3 V Mode
3.25/3.35
V min/V max
3.3 V Nominal. LV Pin Connected Through 0.01
µF to V
CC
5 V Mode
4.95/5.05
V min/V max
5 V Nominal. LV Pin Connected to COM
Externally Available Current
3.25
mA min
Assuming 4 mA Flowing in the Loop
Line Regulation
1
µV/V typ
Load Regulation
15
µV/mA typ
–2–
(Using DN25D
1 as pass transistor as per Figure 3;
REF IN = REF OUT2; TA = TMIN to TMAX unless otherwise noted)
REV. C
(VCC = +3 V to +5 V; REF IN = REF OUT2; TA = TMIN to TMAX unless otherwise noted)


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