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AD420AR-32 Fiches technique(PDF) 3 Page - Analog Devices

No de pièce AD420AR-32
Description  Serial Input 16-Bit 4 mA-20 mA, 0 mA-20 mA DAC
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD420AR-32 Fiches technique(HTML) 3 Page - Analog Devices

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REV. F
–3–
AD420
ABSOLUTE MAXIMUM RATINGS*
VCC to GND
AD420AR/AN-32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 V
IOUT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Digital Inputs to GND . . . . . . . . . . . . . . . . . . . –0.5 V to +7 V
Digital Output to GND . . . . . . . . . . . . . –0.5 V to VLL + 0.3 V
VLL and REF OUT: Outputs Safe for Indefinite Short to Ground
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300
°C
Thermal Impedance:
SOIC (R) Package . . . . . . . . . . . . . . . . . . . . . .
θ
JA = 75
°C/W
PDIP (N) Package . . . . . . . . . . . . . . . . . . . . . .
θ
JA = 50
°C/W
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Max Operating Package
Model
Range
Voltage
Options*
AD420AN-32 – 40
°C to +85°C 32 V
N-24
AD420AR-32
– 40
°C to +85°C 32 V
R-24
*N = Plastic DIP, R = Plastic SOIC.
PIN DESIGNATIONS
TOP VIEW
(Not to Scale)
AD420
NC = NO CONNECT
NC
CAP2
NC
VCC
NC
VLL
FAULT DETECT
RANGE SELECT 2
IOUT
BOOST
CAP1
RANGE SELECT 1
CLEAR
LATCH
CLOCK
DATA IN
DATA OUT
REF IN
OFFSET TRIM
VOUT
GND
NC
REF OUT
NC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD420 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD420
VCC
4k
40
BOOST
IOUT
VOUT
FAULT
DETECT
GND
CAP 1
OFFSET
TRIM
VLL
REF OUT
REF IN
DATA OUT
CLEAR
LATCH
CLOCK
DATA IN
RANGE
SELECT 1
RANGE
SELECT 2
1.25k
REFERENCE
CLOCK
16-BIT
DAC
DATA I/P
REGISTER
19
20
21
23
14
15
16
17
18
6
7
8
9
10
11
2
3
4
5
SWITCHED
CURRENT
SOURCES
AND
FILTERING
CAP 2
Figure 1. Functional Block Diagram
Table I. Truth Table
Inputs
Range
Range
CLEAR
Select 2
Select 1
Operation
0
X
X
Normal Operation
1
X
X
Output at Bottom of Span
X
0
0
0 V–5 V Range
X
0
1
4 mA–20 mA Range
X
1
0
0 mA–20 mA Range
X
1
1
0 mA–24 mA Range
WARNING!
ESD SENSITIVE DEVICE


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