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AD1868N Fiches technique(PDF) 1 Page - Analog Devices |
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AD1868N Fiches technique(HTML) 1 Page - Analog Devices |
1 / 12 page FUNCTIONAL BLOCK DIAGRAM 1 2 3 4 5 6 7 8 9 10 12 13 14 15 11 16 18-BIT DAC 18-BIT SERIAL REGISTER 18-BIT SERIAL REGISTER AD1868 LL DL CK DR LR DGND NRL AGND NRR VL VBR VBL VS VOL VOR VS 18-BIT DAC – + – + VREF VREF REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Single Supply Dual 18-Bit Audio DAC AD1868* One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 FEATURES Dual Serial Input, Voltage Output DACs Single +5 V Supply 0.004% THD+N (typ) Low Power: 50 mW (typ) 108 dB Channel Separation (min) Operates at 8 Oversampling 16-Pin Plastic DIP or SOIC Package APPLICATIONS Portable Compact Disc Players Portable DAT Players and Recorders Automotive Compact Disc Players Automotive DAT Players Multimedia Workstations PRODUCT DESCRIPTION The AD1868 is a complete dual 18-bit DAC offering excellent performance while requiring a single +5 V power supply. It is fabricated on Analog Devices’ ABCMOS wafer fabrication pro- cess. The monolithic chip includes CMOS logic elements, bipo- lar and MOS linear elements, and laser-trimmed thin-film resistor elements. Careful design and layout techniques have re- sulted in low distortion, low noise, high channel separation, and low power dissipation. The DACs on the AD1868 chip employ a partially segmented architecture. The first three MSBs of each DAC are segmented into seven elements. The 15 LSBs are produced using standard R-2R techniques. The segments and R-2R resistors are laser trimmed to provide extremely low total harmonic distortion. The AD1868 requires no deglitcher or trimming circuitry. Low noise is achieved through the use of two noise-reduction capacitors. Each DAC is equipped with a high performance output ampli- fier. These amplifiers achieve fast settling and high slew rate, producing ± 1 V signals at load currents up to ± 1 mA. The buffered output signal range is 1.5 V to 3.5 V. Reference volt- ages of 2.5 V are provided, eliminating the need for “False Ground” networks. A versatile digital interface allows the AD1868 to be directly connected to all digital filter chips. Fast CMOS logic elements allow for an input clock rate of up to 13.5 MHz. This allows for operation at 2 ×, 4×, 8×, or 16× the sampling frequency for each channel. The digital input pins of the AD1868 are TTL and +5 V CMOS compatible. *Protected by U.S. Patent Numbers: 3,961,326; 4,141,004; 4,349,811; 4,857,862; and patents pending. The AD1868 operates on +5 V power supplies. The digital sup- ply, VL, can be separated from the analog supply, VS, for re- duced digital feedthrough. Separate analog and digital ground pins are also provided. In systems employing a single +5 volt power supply, VL and VS should be connected together. In bat- tery operated systems, operation will continue even with reduced supply voltage. Typically, the AD1868 dissipates 50 mW. The AD1868 is packaged in either a 16-pin plastic DIP or a 16- pin plastic SOIC package. Operation is guaranteed over the tem- perature range of –35 °C to +85°C and over the voltage supply range of 4.75 V to 5.25 V. PRODUCT HIGHLIGHTS 1. Single-supply operation @ +5 V. 2. 50 mW power dissipation (typical). 3. THD+N is 0.004% (typical). 4. Signal-to-Noise Ratio is 97.5 dB (typical). 5. 108 dB channel separation (minimum). 6. Compatible with all digital filter chips. 7. 16-pin DIP and 16-pin SOIC packages. 8. No deglitcher required. 9. No external adjustments required. |
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Description similaire - AD1868N |
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