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LA70100M Fiches technique(PDF) 5 Page - Sanyo Semicon Device |
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LA70100M Fiches technique(HTML) 5 Page - Sanyo Semicon Device |
5 / 16 page LA70100M No.7204-5/16 (Note 7) REC mode sync gate start time, release time (TRGB, TRGE) : Input Copm. Sync to T29 and assume the sync gate start time (TRGB) as the time from which the signal at T12 attenuates until the signal at T29 rises and assume the sync gate release time (TRGE) as the time from which the horizontal sync signal rises till the signal at T12 increases (Fig. 2). (Note 9) PB mode sync gate start time, release time (TRGB, TPGE) : Input Comp.sync to T29 and assume the sync gate start time (TRGB) as the time from which the siganl at T18 attenuates until the horizontal sync signal rises and assume the sync gate release time (TPGE) as the time from which the horizontal sync signal rises until the signal at T18 starts increasing. (Note 10) BGP start time, BGP width (Fig. 4) T9=5V (TEST MODE) T29 (C.SYNC) T18 (PB-OUT) TPGE TPGB 64 µs Fig.3 PB mode sync gate timing T29 (C.SYNC) T28 (BGP-OUT) TBGW TBGB 1V Fig.4 BGP timing T29 (C.SYNC) T12 TRGE TRGB 64 µs Fig.2 REC mode sync gate timing |
Numéro de pièce similaire - LA70100M |
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Description similaire - LA70100M |
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