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74VHCT00ASJ Datasheet(Fiches technique) 1 Page - Fairchild Semiconductor

Numéro de pièce 74VHCT00ASJ
Description  Quad 2-Input NAND Gate
Télécharger  8 Pages
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
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74VHCT00ASJ Datasheet(HTML) 1 Page - Fairchild Semiconductor

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©1997 Fairchild Semiconductor Corporation
74VHCT00A Rev. 1.4.0
December 2007
Quad 2-Input NAND Gate
High speed: tPD = 5.0ns (Typ.) at TA = 25°C
High noise immunity: VIH = 2.0V, VIL = 0.8V
Power down protection is provided on all inputs and
Low noise: VOLP = 0.8V (Max.)
Low power dissipation: ICC = 2A (Max.) at TA = 25°C
Pin and function compatible with 74HCT00
General Description
The VHCT00A is an advanced high-speed CMOS
2-Input NAND Gate fabricated with silicon gate CMOS
technology. It achieves the high-speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The internal circuit is
composed of 3 stages, including buffer output, which
provide high noise immunity and stable output.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with VCC = 0V. These circuits prevent
device destruction due to mismatched supply and input/
output voltages. This device can be used to interface 3V
to 5V systems and two supply systems such as battery
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012,
0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide

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