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FAN3121TMX_F085 Fiches technique(PDF) 2 Page - Fairchild Semiconductor

No de pièce FAN3121TMX_F085
Description  Single 9A High-Speed, Low-Side Gate Driver
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN3121TMX_F085 Fiches technique(HTML) 2 Page - Fairchild Semiconductor

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© 2012 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN3121 / FAN3122_F085 • Rev. 1.0.0
2
Ordering Information
Part Number
Logic
Input
Threshold
Package
Eco
Status
Packing
Method
Quantity
per Reel
FAN3121CMX_F085 Inverting Channels +
Enable
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3121TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
FAN3122CMX_F085 Non-Inverting Channels +
Enable
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3122TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Package Outline
Figure 3.
SOIC-8 (Top View)
Thermal Characteristics
(1)
Package
JL
(2)
JT
(3)
JA
(4)
JB
(5)
JT
(6)
Units
8-Pin Small Outline Integrated Circuit (SOIC)
38
29
87
41
2.3
°C/W
Notes:
1.
Estimates derived from thermal simulation; actual values depend on the application.
2.
Theta_JL (
JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads
(including any thermal pad) that are typically soldered to a PCB.
3.
Theta_JT (
JT): Thermal resistance between the semiconductor junction and the top surface of the package,
assuming it is held at a uniform temperature by a top-side heatsink.
4.
Theta_JA (
ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking,
and airflow. The value given is for natural convection with no heatsink, as specified in JEDEC standards
JESD51-2, JESD51-5, and JESD51-7, as appropriate.
5.
Psi_JB (
JB): Thermal characterization parameter providing correlation between semiconductor junction
temperature and an application circuit board reference point for the thermal environment defined in Note 4. For
the SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6.
6.
Psi_JT (
JT): Thermal characterization parameter providing correlation between the semiconductor junction
temperature and the center of the top of the package for the thermal environment defined in Note 4.


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