SS732/SS632

Hall Latch - High Sensitivity

   

                      

        

V2.00

May.1

                   

       

 

5

, 2012

G

eral Electrical Specifications

DC

less otherwise specified)

Parameter

Symbol

Test Conditions

Min

Typ

Max

Units

en

Sup

24

V

ply Voltage

VDD

Operating

2.2

Sup

IDD

ply Current

5

mA

Out

e

VDSon

= 20mA,

0

V

put Saturation Voltag

IOUT

.5

Out

IOFF

1

10

µA

put Leakage Current

B < B

T = 24V

Output R

Tr

Ω, CL

0.25

µs

ise Time

RL = 1k

= 20pF

Output Fall Time

Tf

RL = 1kΩ, CL = 20pF

0.25

µs

Inte

Rpu

9

12

15

rnal pull-up resistor

---

kΩ

Ma

ency

FSW

10

ximum Switching Frequ

---

KHz

Pac

nce

RTH

le layer (1

301

kage Thermal Resista

Sing

S) Jedec board

°C/W

Ele

Note: The output of S732 will be switched after the supply voltage is over 2.2V, but the magnetic characteristics won't be normal until

the s

M

DC

Pa

Symbol

Test Conditions

Min

Typ

Max

Units

ctrical specifications

upply is over 2.5V.

agnetic Specifications

Operating Parameters VDD = 2.5V to 24V (unless otherwise specified)

rameter

O

ating Point

10

18

30

G

per

R

-30

-18

-10

G

elease Point

Hy

HYS

E spec., TA = 85°C

steresis

B

36

G

Pa

Typ

Max

Units

rameter

Symbol

Test Conditions

Min

Op

18

erating Point

7

35

G

Rel

-35

-18

ease Point

-7

G

Hys

K

, TA 85°C

teresis

spec.

=

36

G

Operating Point

5

18

40

G

Relea

-40

-18

-5

G

se Point

Hys

ec., TA = 150°C

36

teresis

L sp

G

Mag

s

Ou

versus Magnetic Pole

netic specification

tput Behaviour

批注 [PKU1]: 这个不对，从图

上看滞后工作区应位于操作

点和释放点之间，建议删了

为它取决于那两个

点，

还要加 K 系列的值，

只

算了 

批

KU2]: 这个不对，从图

上

后工作区应位于操作

点和

点之间，建议删了

为它取决于那两个

点，同时还要加 K 系列的值，

只

算了 

这项，因

同时

能估

注 [P

看滞

释放

这项，因

能估