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SN74ACT8999DW Fiches technique(PDF) 5 Page - Texas Instruments |
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SN74ACT8999DW Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 29 page SN54ACT8999, SN74ACT8999 SCANPATH SELECTORS WITH 8BIT BIDIRECTIONAL DATA BUSES SCANCONTROLLED IEEE STD 1149.1 (JTAG) TAP MULTIPLEXERS SCAS158D − JUNE 1990 − REVISED DECEMBER 1996 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 state diagram description The TAP proceeds through the states in Figure 1 according to IEEE Standard 1149.1. There are six stable states (indicated by a looping arrow) and ten unstable states in the diagram. A stable state is defined as a state the TAP can retain for consecutive TCK cycles. Any state that does not meet this criterion is an unstable state. There are two main paths through the state diagram: one to manipulate a data register and one to manipulate the instruction register. No more than one register can be manipulated at a time. TMS = L Test-Logic-Reset Select-DR-Scan Select-IR-Scan Capture-DR Shift-DR Exit1-DR Pause-DR Exit2-DR Update-DR Capture-IR Shift-IR Exit1-IR Pause-IR Exit2-IR Update-IR TMS = H TMS = L TMS = H TMS = H TMS = L TMS = L TMS = L TMS = L TMS = H TMS = H TMS = L TMS = L TMS = H TMS = H TMS = H TMS = H TMS = H TMS = H TMS = L TMS = L TMS = H TMS = H TMS = H TMS = L TMS = L TMS = H TMS = H TMS = L TMS = L TMS = L TMS = L Run-Test / Idle Figure 1. TAP-Controller State Diagram |
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