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TPS709135DBVR Fiches technique(PDF) 6 Page - Texas Instruments |
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TPS709135DBVR Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 11 page TPS709xx SBVS186 – MARCH 2012 www.ti.com APPLICATION INFORMATION The TPS709xx are a series of devices that belong to a new family of next-generation, low-dropout (LDO) voltage regulators. They consume low quiescent current and deliver excellent line and load transient performance. This performance, combined with low noise, very good PSRR with little (VIN – VOUT) headroom, makes these devices ideal for RF portable applications, current limit, and thermal protection. The TPS709xx are specified from –40°C to +125°C. BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE Input and output capacitors should be placed as close to the device pins as possible. To improve ac performance (such as PSRR, output noise, and transient response), it is recommended that the board be designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should be connected directly to the device GND pin. INTERNAL CURRENT LIMIT The TPS709xx internal current limit helps to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output voltage is not regulated, and can be measured as VOUT = ILIMIT × RLOAD. The PMOS pass transistor dissipates [(VIN – VOUT) × ILIMIT] until a thermal shutdown is triggered and the device turns off. As the device cools down, it is turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and thermal shutdown; see the Thermal Information section for more details. The TPS709xx is characterized over the recommended operating output current range up to 150 mA. The internal current limit begins to limit the output current at a minimum of 260 mA of output current. The TPS709xx continues to operate for output currents between 150 mA and 260 mA but some data sheet parameters may not be met, resulting in increased power dissipation. DROPOUT VOLTAGE The TPS709xx uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO approximately scales with the output current because the PMOS device behaves as a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in in the Typical Characteristics. TRANSIENT RESPONSE As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but increases transient response duration. UNDERVOLTAGE LOCK-OUT (UVLO) The TPS709xx uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry operates properly. REVERSE CURRENT PROTECTION The TPS709xx have integrated reverse current protection. Reverse current protection prevents current from flowing from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse current protection circuitry places the power path in high impedance when it detects that the output voltage is higher than the input voltage. This setting reduces leakage current from the output to the input to TBD nA, typical. The reverse current protection is always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 2.0 V. Reverse current can flow if the output voltage is less than 2.0 V and if input voltage is less than the output voltage. 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated |
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