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CDCLVC1310 Fiches technique(PDF) 4 Page - Texas Instruments

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No de pièce CDCLVC1310
Description  Ten-Output Low-Jitter Low-Power Clock Buffer
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

CDCLVC1310 Fiches technique(HTML) 4 Page - Texas Instruments

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CDCLVC1310
SCAS917B
– JULY 2011 – REVISED FEBRUARY 2012
www.ti.com
PIN FUNCTIONS
PIN
I/O
TYPE
DESCRIPTION
NAME
NO(s)
4, 9, 15,
16, 21,
GND
PWR
Analog
Power supply ground
25, 26,
32
IN_SEL0,
30, 29
I
Digital
Input clock selection (pulldown of 150 k
Ω)
IN_SEL1
OE
31
I
Digital
LVCMOS output enable (pulldown of 150 k
Ω)
Inverting differential primary reference input, internally biased to Vdd/2 (pullup/pulldown
PRI_INN
14
I
Analog
of 150 k
Ω)
PRI_INP
13
I
Analog
Non-inverting differential/single-ended primary reference input (pulldown of 150 k
Ω)
Inverting differential secondary reference input, internally biased to Vdd/2
SEC_INN
27
I
Analog
(pullup/pulldown of 150 k
Ω)
SEC_INP
28
I
Analog
Non-inverting differential/single-ended secondary reference input (pulldown of 150 k
Ω)
VDD
10
PWR
Analog
Power supply pins
2, 6, 19,
VDDO
PWR
Analog
I/O power supply pins
23
XIN
11
I
Analog
Crystal Oscillator Input or XTAL Bypass mode
XOUT
12
I
Analog
Crystal Oscillator Output
Y0
1
O
Analog
LVCMOS output 0
Y1
3
O
Analog
LVCMOS output 1
Y2
5
O
Analog
LVCMOS output 2
Y3
7
O
Analog
LVCMOS output 3
Y4
8
O
Analog
LVCMOS output 4
Y5
17
O
Analog
LVCMOS output 5
Y6
18
O
Analog
LVCMOS output 6
Y7
20
O
Analog
LVCMOS output 7
Y8
22
O
Analog
LVCMOS output 8
Y9
24
O
Analog
LVCMOS output 9
Table 1. Input Selection
IN_SEL1
IN_SEL0
INPUT CHOSEN
0
0
PRI_IN
0
1
SEC_IN
1
0
XTAL/overdrive(1)
1
1
XTAL bypass(2)
(1)
This mode can be used to overdrive the XTAL oscillator with an
LVCMOS input. For characteristics; see LVCMOS OUTPUT
CHARACTERISTICS.
(2)
This mode is only XTAL bypass. For characteristics, see LVCMOS
OUTPUT CHARACTERISTICS.
Table 2. INPUT/OUTPUT OPERATION(1)
INPUT STATE
OUTPUT STATE
PRI_INx, SEC_INx open
Logic LOW
PRI_INP/SEC_INP = HIGH,
Logic HIGH
PRI_INN/SEC_INN = LOW
PRI_INP/SEC_INP = LOW,
Logic LOW
PRI_INN/SEC_INN = HIGH
(1)
Device must have switching edge to obtain output states.
4
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Copyright
© 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): CDCLVC1310


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