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TPS71933-33DRVT Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS71933-33DRVT Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 24 page EN1 GND GND EN2 6 5 4 OUT1 IN OUT2 1 2 3 OUT1 IN OUT2 EN1 GND EN2 C2 B2 A2 C1 B1 A1 TPS718xx TPS719xx TPS718Axx TPS719Axx OUT1 IN OUT2 EN1 GND EN2 A1 B1 C1 A2 B2 C2 TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 DRV PACKAGE SON-6 (TOP VIEW) YZC PACKAGE 6-BALL WCSP (TOP VIEW) YZC PACKAGE 6-BALL WCSP (TOP VIEW) PIN DESCRIPTIONS TPS718xx TPS718Axx(1) TPS719xx TPS719Axx(1) NAME DRV YZC YZC DESCRIPTION Output of Regulator 1. A small ceramic capacitor (typically ≥ 1 µF) is OUT1 1 C1 A2 needed from this pin to ground to assure stability. IN 2 B1 B2 Input supply to both regulators. Output of Regulator 2. A small ceramic capacitor (typically ≥ 1 µF) is OUT2 3 A1 C2 needed from this pin to ground to assure stability. Enable pin for Regulator 2. Driving the Enable pin (EN2) high turns on EN2 4 A2 C1 Regulator 2. Driving this pin low puts Regulator 2 into shutdown mode, reducing operating current. GND 5 B2 B1 Ground. DRV thermal pad should also be connected to ground. Enable pin for Regulator 1. Driving the Enable pin (EN1) high turns on EN1 6 C2 A1 Regulator 1. Driving this pin low puts Regulator 1 into shutdown mode, reducing operating current. (1) A option denotes devices with rotated Pin 1 orientation on Wafer Chipscale packages. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPS718xx TPS719xx |
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