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PWP PACKAGE

(TOP VIEW)

NC

V

IN1

V

IN1

MR1

MR2

EN

SEQ

GND

V

IN2

V

IN2

NC

V

OUT1

V

OUT1

V

/FB1

SENSE1

PG1

RESET

V

/FB2

SENSE2

V

OUT2

V

OUT2

NC

DESCRIPTION

TPS70751-EP

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATOR

WITH POWER-UP SEQUENCING FOR SPLIT-VOLTAGE DSP SYSTEMS

SLVS718 – DECEMBER 2006

• Controlled Baseline

• Ultralow 190-µA (Typ) Quiescent Current

–

One Assembly/Test Site, One Fabrication

• 1-µA Input Current During Standby

Site

• Low Noise: 65 µVrms Without Bypass

• Enhanced Diminishing Manufacturing Sources

Capacitor

(DMS) Support

• Quick Output Capacitor Discharge Feature

• Enhanced Product-Change Notification

• Two Manual Reset Inputs

• 2% Accuracy Over Load and Temperature

• Dual Output Voltages for Split-Supply

• Undervoltage Lockout (UVLO) Feature

Applications

• 20-Pin PowerPAD™ Thin Shrink Small-Outline

• Selectable Power-Up Sequencing for DSP

Package (TSSOP)

Applications (See Part Number TPS708xx for

• Thermal Shutdown Protection

Independently Enabled Outputs)

• Output Current Range of 250 mA on

Regulator 1 and 125 mA on Regulator 2

• Fast Transient Response

• 3.3-V/1.8-V Fixed Voltage Outputs

• Open-Drain Power-On Reset With 120-ms

Delay

• Open-Drain Power Good for Regulator 1

(1)

Component qualification in accordance with JEDEC and

industry standards to ensure reliable operation over an

extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

temperature cycle, autoclave or unbiased HAST,

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

justifying use of this component beyond specified

xxxxx

performance and environmental limits.

The TPS707xx family devices are designed to provide a complete power-management solution for TI DSP,

processor power, ASIC, FPGA, and digital applications where dual-output voltage regulators are required. Easy

programmability of the sequencing function makes this family ideal for any TI DSP applications with

power-sequencing requirements. Differentiated features, such as accuracy, fast transient response, SVS

supervisory circuit (power-on reset), manual reset inputs, and enable function, provide a complete system

solution.

The TPS707xx family of voltage regulators offer very low dropout (LDO) voltage and dual outputs with power-up

sequence control, which is designed primarily for DSP applications. These devices have extremely low noise

output performance without using any added filter bypass capacitors, and are designed to have a fast transient

response and be stable with 10-

µF low ESR capacitors.

The TPS70751 has a fixed voltage of 3.3 V/1.8 V. Regulator 1 can support up to 250 mA and regulator 2 can

support up to 125 mA. Separate voltage inputs allow the designer to configure the source power.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 83 mV on

regulator 1) and is directly proportional to the output current. Additionally, since the PMOS pass element is a

voltage-driven device, the quiescent current is very low and independent of output loading (maximum of 230

µA

over the full range of output current). This LDO family also features a sleep mode; applying a high signal to EN

(enable) shuts down both regulators, reducing the input current to 1

µA at T

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2006, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.