RT Resistor − k

Ω

0

200

400

600

800

1000

1200

1400

1600

1800

2000

2200

0

200

400

600

800

1000

1200

G007

8V

14V

24V

40V

dly

1 ms

tdelay = trdly

C =

C, Where C = capacitor on C

pin

nF

æ

ö

´

´

ç

÷

è

ø

TPS55332-Q1

www.ti.com

SLVS939A – JUNE 2009 – REVISED JUNE 2010

Enable / Shutdown (EN)

The Enable pin provides electrical on/off control of the regulator. Once the Enable pin voltage exceeds the

threshold voltage, the regulator starts operation and the internal soft start begins to ramp. If the Enable pin

voltage is pulled below the threshold voltage, the regulator stops switching and the internal soft start resets.

Connecting the pin to ground or to any voltage less than 0.7 V disables the regulator and activates shutdown

mode. The quiescent current of the TPS55332 in shutdown mode is typically < 2 mA. This pin has to have an

external pull up or pull down to change the state of the device.

The Reset delay pin sets the desired delay time for asserting the RST pin high after the supply has exceeded the

programmed Vreg_RST voltage. The delay may be programmed in the range of 2.2 ms to 200 ms using

capacitors in the range of 2.2 nF to 200 nF. The delay time is calculated using Equation 3:

(3)

Reset Pin (RST)

The RST pin is an open-drain output. The power-on reset output is asserted low until the output voltage exceeds

the programmed Vreg_RST voltage threshold and the reset delay timer has expired. Additionally, whenever the

Enable pin is low or open, RST is immediately asserted low regardless of the output voltage. There is a reset

de-glitch timer to prevent a reset being invoked due to short negative transients on the output line. If a thermal

shut down occurs due to excessive thermal conditions this pin is asserted low, where switching is commanded

off and the output drops below the rest threshold set on the RST_TH terminal.

Copyright © 2009–2010, Texas Instruments Incorporated

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