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ISLA216P25 Fiches technique(PDF) 8 Page - Intersil Corporation

No de pièce ISLA216P25
Description  High Performance 14-Bit, 125MSPS ADC
Download  34 Pages
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISLA216P25 Fiches technique(HTML) 8 Page - Intersil Corporation

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ISLA214P12
8
FN7982.2
June 27, 2012
Absolute Maximum Ratings
Thermal Information
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V
AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Latchup (Tested per JESD-78C;Class 2,Level A) . . . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
72 Ld QFN (Notes 3, 4) . . . . . . . . . . . . . . . .
23
0.9
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
4. For
θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (Typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = 125Msps. Boldface limits apply over the operating temperature
range, -40°C to +85°C.
PARAMETER
SYMBOL
CONDITIONS
ISLA214P12
UNITS
MIN
(Note 5)
TYP
MAX
(Note 5)
DC SPECIFICATIONS (Note 6)
Analog Input
Full-Scale Analog Input Range
VFS
Differential
1.95
2.0
2.1
VP-P
Input Resistance
RIN
Differential
600
Ω
Input Capacitance
CIN
Differential
4.5
pF
Full Scale Range Temp. Drift
AVTC
Full Temp
74
ppm/°C
Input Offset Voltage
VOS
-5.0
-1.7
5.0
mV
Common-Mode Output Voltage
VCM
0.94
V
Common-Mode Input Current
(per pin)
ICM
2.6
µA/MSPS
Clock Inputs
Inputs Common Mode Voltage
0.9
V
CLKP,CLKN Input Swing (Note 7)
1.8
V
Power Requirements
1.8V Analog Supply Voltage
AVDD
1.7
1.8
1.9
V
1.8V Digital Supply Voltage
OVDD
1.7
1.8
1.9
V
1.8V Analog Supply Current
IAVDD
152
161
mA
1.8V Digital Supply Current (Note 6)
I
OVDD
3mA LVDS (SDR)
68.5
77
mA
Power Supply Rejection Ratio
PSRR
30MHz, 30mVP-P signal on AVDD
40
dB
Total Power Dissipation
Normal Mode
PD
CMOS (DDR)
310
mW
CMOS (SDR)
313
mW
2mA LVDS (SDR)
369
mW
3mA LVDS (DDR)
360
3mA LVDS (SDR)
397
428
mW


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