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TPS7A6150QKVURQ1 Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce TPS7A6150QKVURQ1
Description  300-mA 40-V LOW-DROPOUT REGULATOR WITH 25-關A QUIESCENT CURRENT
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

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TPS7A6033-Q1, TPS7A6050-Q1
TPS7A6133-Q1, TPS7A6150-Q1
www.ti.com
SLVSA62G – MARCH 2010 – REVISED MARCH 2012
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
NO.
DESCRIPTION
VALUE
UNIT
VIN,
1.1
Unregulated inputs(2)(3)
45
V
VEN
1.2
VOUT
Regulated output
7
V
1.3
nRST
Open drain reset output(2)
7
V
1.4
RDELAY
Output to charge an external cpacitor(2)
7
V
Thermal impedance junction to exposed pad KTT (D2PAK) package
1.3
°C/W
1.5
θJP
Thermal impedance junction to exposed pad KVU (DPAK) package
1.1
°C/W
Thermal impedance junction to ambient KTT (D2PAK) package(4)
30.2
°C/W
1.6
θJA
Thermal impedance junction to ambient KVU (DPAK) package(4)
29.3
°C/W
Thermal impedance junction to ambient KTT (D2PAK) package (5)
34.4
°C/W
1.7
θJA
Thermal impedance junction to ambient KVU (DPAK) package(5)
38.6
°C/W
1.8
ESD
Electrostatic discharge(6)
2
kV
1.9
TOP
Operating ambient temperature
125
°C
1.10
TS
Storage temperature range
-65 to +150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to GND.
(2)
Absolute negative voltage on these pins not to go below –0.3V.
(3)
Absolute maximum voltage for duration less than 480ms.
(4)
The thermal data is based on JEDEC standard high K profile – JESD 51-5. The copper pad is soldered to the thermal land pattern. Also
correct attachment procedure needs to be incorporated.
(5)
The thermal data is based on JEDEC standard low K profile – JESD 51-3. The copper pad is soldered to the thermal land pattern. Also
correct attachment procedure needs to be incorporated.
(6)
The human body model is a 100pF capacitor discharged through a 1.5k
Ω resistor into each pin.
DISSIPATION RATINGS
TA < 25°C POWER
DERATING FACTOR
TA = 85°C POWER
NO.
JEDEC STANDARD
PACKAGE
RATING (W)
ABOVE TA = 25°C (°C/W)
RATING (W)
2.1
5 pin KTT
3.63
34.4
1.89
JEDEC Standard PCB -
low K, JESD 51-3
2.2
5 pin KVU
3.24
38.6
1.68
2.3
5 pin KTT
4.14
30.2
2.15
JEDEC Standard PCB -
high K, JESD 51-5
2.4
5 pin KVU
4.27
29.3
2.22
RECOMMENDED OPERATING CONDITIONS
NO.
DESCRIPTION
MIN
MAX
UNIT
3.1
VIN, VEN
(1)
Unregulated input voltage
4
40
V
nRST,
3.2
Low voltage input/output
0
5.25
V
RDELAY(2)
3.3
TJ
Operating junction temperature range
-40
150
°C
(1)
Applicable for TPS7A61xx only.
(2)
Applicable for TPS7A60xx only.
ELECTRICAL CHARACTERISTICS
VIN = 14V, TJ = -40ºC to 150ºC (unless otherwise noted)
NO.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4. Input Voltage (VIN pin)
Fixed 5V output, IOUT = 1mA
5.3
40
4.1
VIN
Input voltage
V
Fixed 3.3V output, IOUT = 1mA
4
40
Copyright © 2010–2012, Texas Instruments Incorporated
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