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DAC1627D1G25 Fiches technique(PDF) 9 Page - Integrated Device Technology

No de pièce DAC1627D1G25
Description  Dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and x8 interpolating
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Fabricant  IDT [Integrated Device Technology]
Site Internet  http://www.idt.com
Logo IDT - Integrated Device Technology

DAC1627D1G25 Fiches technique(HTML) 9 Page - Integrated Device Technology

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DAC1627D1G25 3
© IDT 2012. All rights reserved.
Data sheet
Rev. 03 — 2 July 2012
9 of 81
Integrated Device Technology
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
Digital inputs (pins LD[15]P to LD[0]P, LD[15]N to LD[0]N, LCKP and LCKN, ALIGNP and ALIGNN)
Vi
input voltage
Vgpd <50mV[3]
C
825
-
1575
mV
Vidth
input
differential
threshold
voltage
Vgpd <50mV[3]
C
100
-
+100
mV
Ri
input
resistance
D-
100
-
Ci
input
capacitance
D
-
0.8
-
pF
pins LCKP and LCKN
D
-
0.9
-
pF
Digital inputs/outputs (pins MDSN, MDSP)
Vo(dif)(p-p)
peak-to-peak
differential
output
voltage
C-
500
-
mV
Ci
input
capacitance
between GND and pin
MDSN or MDSP
D
-
0.6
-
pF
Ri
input
resistance
D-
100
-
Vi
input voltage
Vgpd <50mV[3]
C
825
-
1575
mV
Vidth
input
differential
threshold
voltage
Vgpd <50mV[3]
C
100
-
+100
mV
Digital inputs/outputs (pins IO0, IO1, SDO, SDIO, SCLK, SCS_N, RESET_N)
VIL
LOW-level
input voltage
CGND
-
0.3VDDD
V
VIH
HIGH-level
input voltage
C0.7VDDD
-VDDD
V
VOL
LOW-level
output
voltage
pins IO0, IO1, SDO, and
SDIO
CGND
-
0.1VDDD
V
VOH
HIGH-level
output
voltage
pins IO0, IO1, SDO, and
SDIO
C0.9VDDD
-VDDD
V
IIL
LOW-level
input current
maximum VIL
I
10
-
+10
A
IIH
HIGH-level
input current
minimum VIH
I
10
-
+10
A
Ci
input
capacitance
D
-
2.2
-
pF
Analog outputs (pins IOUTAP, IOUTAN, IOUTBP, IOUTBN)
Ibias
bias current
DC current
D
-
2.5
-
mA
Table 5.
Characteristics …continued
VDDA(1V8) =1.8 V; VDDD =1.8 V; VDDA(3V3) = 3.3 V; Typical values measured at Tamb =+25 C; RL =50 ; IO(fs) =20 mA;
maximum sample rate used; external PLL; no auxiliary DAC; no inverse sinus x/x; no output correction; output load condition
defined in Figure 42; output level = 1 V (p-p).
Symbol
Parameter
Conditions
Test[1]
Min
Typ
Max
Unit


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