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TPS43331-Q1 Fiches technique(PDF) 11 Page - Texas Instruments |
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TPS43331-Q1 Fiches technique(HTML) 11 Page - Texas Instruments |
11 / 50 page t t t VGBx VGTx Oscillator 50% 10% 90% 90% 10% 1 2 3 4 5 2 3 TPS43331-Q1 www.ti.com SLVSA38 – DECEMBER 2009 SWITCHING REGULATORS SWITCHING CHARACTERISTICS VBAT = VBATP = 6 V to 18 V, TJ = -40ºC to 150ºC (unless otherwise noted) NO. PARAMETER TEST CONDITIONS MIN MAX UNIT 1 fSW Nominal operating frequency 165 kHz 1 fSWTOL Operating frequency tolerance -15 15 % 1 fSYN CH Synch frequency range nominal 225 400 kHz 1 DSYN CH Synch input duty ratio 40 60 % 2 tr Gate drive transition time, rising VGTx = VGB × 6 V, CVGBx = 100 nF 500(1) ns 3 tf Gate drive transition time, falling VGTx = VGB × 6 V, CVGBx = 100 nF 100(1) ns 4 tDS Synchronous switch on delay 20 100(2) ns 5 tdt Top switch on delay 20 100 ns tdc Minimum on time 3.5(3) 98.2(4) % (1) Switching times will vary for different external FET. (2) Delay time is intended to guard against shoot-through losses and will be dependent upon the switch transition times. Measurements are done at either threshold values or 50% as shown below. (3) Don(min) = (1.2 V × (1 – tol)) / Vov(max) = (1.2 V × 0.95) / 33 V. (4) Min refresh time of 220 ns every five periods at 440 kHz. Figure 4. Switching Regulators Timing Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TPS43331-Q1 |
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