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TPS27081A Fiches technique(PDF) 4 Page - Texas Instruments |
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TPS27081A Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 14 page 1 2 3 4 5 6 2.9mm x 1.6mm TSOT-23 (DDC) (TOP VIEW) R2 VOUT VOUT R1/C1 ON/OFF VIN TPS27081ADDC R2 OUT OUT 1 2 3 6 5 GND (Thermal Pad) R1/C1 ON/OFF VIN 2mm x 2mm SON-6 (DRV) (TOP VIEW) 4 TPS27081ADRV PREVIEW ONLY TPS27081A SLVSBE9A – APRIL 2012 – REVISED JULY 2012 www.ti.com DEVICE INFORMATION TPS27081A PIN DESCRIPTION PIN DESCRIPTION NAME NUMBER R2 1 Source Terminal of NMOS (Q2) - Connect to system GND directly or through a slew control resistor VOUT 2, 3 Drain Terminal of Power PFET (Q1) - Connect a slew control capacitor between pins VOUT/C1 and R1/C1 VIN 4 Source Terminal of Power PFET (Q1) - connect a slew control/pull-up resistor between the pins VIN/R1 and R1/C1 ON/OFF 5 Active high enable pin – when driven with a high impedance driver connect an external pull down resistor to GND R1/C1 6 Gate Terminal of Power PFET (Q1) 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TPS27081A |
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