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SL74LS245 Fiches technique(PDF) 3 Page - System Logic Semiconductor |
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SL74LS245 Fiches technique(HTML) 3 Page - System Logic Semiconductor |
3 / 4 page SL74LS245 System Logic Semiconductor SLS Note 1: Not more thanone output should be shorted at a time, and duration of the short -circuit should not exceed one second. AC ELECTRICAL CHARACTERISTICS (T A = 25 °C, V CC = 5.0 V, tr = 15 ns,, tf = 6.0 ns) Symbol Parameter Test Condition Min Max Unit tPLH Propagation Delay Time, Low-to-High Level Output (from A or B to Output) 12 ns tPHL Propagation Delay Time, High-to-Low Level Output (from A or B to Output) CL = 45 pF, RL = 667 Ω 12 ns tPZH Output Enable Time to High Level (from OE to Output) 40 ns tPZL Output Enable Time to Low Level (from OE to Output) 40 ns tPHZ Output Disable Time from High Level (from OE to Output) CL = 5 pF 25 ns tPLZ Output Disable Time from Low Level (from OE to Output) RL = 667 Ω 25 ns tPZL - S1 closed, S2 opened tPZH- S1 opened, S2 closed tPLZ, tPHZ - S1 and S2 closed Figure 1. Switching Waveforms (See Figure 3) Figure 2. Switching Waveforms (See Figure 4) NOTES A. CL includes probe and jig capacitance. B. All diodes are 1N916 or 1N3064. NOTES A. CL includes probe and jig capacitance. B. All diodes are 1N916 or 1N3064. Figure 3. Test Circuit Figure 4. Test Circuit |
Numéro de pièce similaire - SL74LS245 |
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Description similaire - SL74LS245 |
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