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CDCLVD1213RGTT Fiches technique(PDF) 5 Page - Texas Instruments |
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CDCLVD1213RGTT Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 17 page CDCLVD1213 www.ti.com SCAS897 – JULY 2010 ELECTRICAL CHARACTERISTICS (continued) At VCC = 2.375 V to 2.625 V and TA = –40°C to 85°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LVDS OUTPUT CHARACTERISTICS |VOD| Differential output voltage magnitude 250 450 mV Change in differential output voltage ΔVOD VIN, DIFF, PP = 0.3V, –15 15 mV magnitude RL = 100 Ω Steady-state common mode output VOC(SS) 1.1 1.375 V voltage Steady-state common mode output VIN, DIFF, PP = 0.6V, ΔVOC(SS) –15 15 mV voltage RL = 100 Ω IOS Short-circuit output current VOD = 0 V ±24 mA VOS Output ac common mode VIN, DIFF, PP = 0.6V, RL = 100 Ω 25 70 mVPP Percentage of output amplitude Vring Output overshoot and undershoot 10% VOD tPD Propagation delay VIN, DIFF, PP = 0.3 V 1.5 2.5 ns tSK, PP Part-to-part skew 600 ps tSK, O Output skew (1) 20 ps Pulse skew (with 50% duty cycle Crossing-point-to-crossing-point tSK,P –50 50 ps input) distortion Random additive jitter (with 50% duty Edge speed 0.75V/ns tRJIT 0.3 ps, RMS cycle input) 10 kHz – 20 MHz tR/tF Output rise/fall time 20% to 80%,100 Ω, 5 pF 50 300 ps ICCSTAT Static supply current Outputs unterminated, f = 0 Hz 17 28 mA All outputs, RL = 100 Ω, ICC100 Supply current 40 58 mA f = 100 MHz All outputs, RL = 100 Ω, ICC800 Supply current 60 85 mA f = 800 MHz (1) Undivided outputs only. Typical Additive Phase Noise Characteristics for 100 MHz Clock PARAMETER MIN TYP MAX UNIT phn100 Phase noise at 100 Hz offset -132.9 dBc/Hz phn1k Phase noise at 1 kHz offset -138.8 dBc/Hz phn10k Phase noise at 10 kHz offset -147.4 dBc/Hz phn100k Phase noise at 100 kHz offset -153.6 dBc/Hz phn1M Phase noise at 1 MHz offset -155.2 dBc/Hz phn10M Phase noise at 10 MHz offset -156.2 dBc/Hz phn20M Phase noise at 20 MHz offset -156.6 dBc/Hz tRJIT Random additive jitter from 10 kHz to 20 MHz 171 fs, RMS Typical Additive Phase Noise Characteristics for 737.27 MHz Clock PARAMETER MIN TYP MAX UNIT phn100 Phase noise at 100 Hz offset -80.2 dBc/Hz phn1k Phase noise at 1 kHz offset -114.3 dBc/Hz phn10k Phase noise at 10 kHz offset -138 dBc/Hz phn100k Phase noise at 100 kHz offset -143.9 dBc/Hz phn1M Phase noise at 1 MHz offset -145.2 dBc/Hz phn10M Phase noise at 10 MHz offset -146.5 dBc/Hz phn20M Phase noise at 20 MHz offset -146.6 dBc/Hz tRJIT Random additive jitter from 10 kHz to 20 MHz 65 fs, RMS Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): CDCLVD1213 |
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