54ACT11020, 74ACT11020

DUAL 4INPUT POSITIVENAND GATES

SCAS016A − D2957, JUNE 1987 − REVISED APRIL 1993

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Copyright

2−1

PCB Layout

Minimize High-Speed Switching Noise

CMOS) 1-

mm Process

at 125

°C

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain two independent 4-input

NAND gates. They perform the Boolean functions

Y = A

SBSCSD or Y = A + B + C + D in positive logic.

The 54ACT11020 is characterized for operation

over the full military temperature range of − 55

°C

to 125

°C. The 74ACT11020 is characterized for

operation from − 40

°C to 85°C.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

C

D

OUTPUT

Y

H

H

H

H

L

L

XX

X

H

X

LX

X

H

X

XL

X

H

X

X

X

L

H

&

3

5

1Y

2Y

1A

1B

1C

1D

2A

2B

2C

2D

2

1

13

12

10

9

7

6

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1B

1A

1Y

GND

2Y

2D

2C

NC

1C

1D

2A

2B

NC

54ACT11020 ...J PACKAGE

74ACT11020 ...D OR N PACKAGE

(TOP VIEW)

3

2

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

2B

NC

NC

NC

2C

NC

NC

1B

NC

1A

54ACT11020 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

logic diagram (positive logic)

1A

1B

1C

1D

1Y

2A

2B

2C

2D

2Y

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC is a trademark of Texas Instruments Incorporated.