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ADF4351BCPZ Fiches technique(PDF) 7 Page - Analog Devices

No de pièce ADF4351BCPZ
Description  Wideband Synthesizer
Download  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADF4351BCPZ Fiches technique(HTML) 7 Page - Analog Devices

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Data Sheet
ADF4351
Rev. 0 | Page 7 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
CLK
2
DATA
3
LE
4
CE
5
SW
6
7
24
VREF
23
VCOM
22
21
20
19
18
17
8
ADF4351
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
VP
CPOUT
CPGND
RSET
VTUNE
AGNDVCO
AGNDVCO
TEMP
VVCO
NOTES
1. THE LFCSP HAS AN EXPOSED PAD THAT
MUST BE CONNECTED TO GND.
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
CLK
Serial Clock Input. Data is clocked into the 32-bit shift register on the CLK rising edge. This input is a high
impedance CMOS input.
2
DATA
Serial Data Input. The serial data is loaded MSB first with the three LSBs as the control bits. This input is a high
impedance CMOS input.
3
LE
Load Enable. When LE goes high, the data stored in the 32-bit shift register is loaded into the register that is
selected by the three control bits. This input is a high impedance CMOS input.
4
CE
Chip Enable. A logic low on this pin powers down the device and puts the charge pump into three-state mode.
A logic high on this pin powers up the device, depending on the status of the power-down bits.
5
SW
Fast Lock Switch. A connection should be made from the loop filter to this pin when using the fast lock mode.
6
V
P
Charge Pump Power Supply. V
P must have the same value as AVDD. Place decoupling capacitors to the ground
plane as close to this pin as possible.
7
CP
OUT
Charge Pump Output. When enabled, this output provides ±I
CP to the external loop filter. The output of the
loop filter is connected to V
TUNE to drive the internal VCO.
8
CP
GND
Charge Pump Ground. This output is the ground return pin for CP
OUT.
9
AGND
Analog Ground. Ground return pin for AV
DD.
10
AV
DD
Analog Power Supply. This pin ranges from 3.0 V to 3.6 V. Place decoupling capacitors to the analog ground
plane as close to this pin as possible. AV
DD must have the same value as DVDD.
11, 18, 21
A
GNDVCO
VCO Analog Ground. Ground return pins for the VCO.
12
RF
OUTA+
VCO Output. The output level is programmable. The VCO fundamental output or a divided-down version is
available.
13
RF
OUTA−
Complementary VCO Output. The output level is programmable. The VCO fundamental output or a divided-
down version is available.
14
RF
OUTB+
Auxiliary VCO Output. The output level is programmable. The VCO fundamental output or a divided-down
version is available.
15
RF
OUTB−
Complementary Auxiliary VCO Output. The output level is programmable. The VCO fundamental output or a
divided-down version is available.
16, 17
V
VCO
Power Supply for the VCO. This pin ranges from 3.0 V to 3.6 V. Place decoupling capacitors to the analog
ground plane as close to these pins as possible. V
VCO must have the same value as AVDD.
19
TEMP
Temperature Compensation Output. Place decoupling capacitors to the ground plane as close to this pin as
possible.
20
V
TUNE
Control Input to the VCO. This voltage determines the output frequency and is derived from filtering the CP
OUT
output voltage.


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