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AD5064 Fiches technique(PDF) 7 Page - Analog Devices

No de pièce AD5064
Description  Industrial Current/Voltage Output Driver
Download  36 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5064 Fiches technique(HTML) 7 Page - Analog Devices

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Data Sheet
AD5750/AD5750-1/AD5750-2
Rev. D | Page 7 of 36
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
CURRENT OUTPUT CHARACTERISTICS3
Current Loop Compliance Voltage
0
AVDD − 2.75
V
Resistive Load
See test conditions/comments column
Chosen such that compliance is
not exceeded
Inductive Load
See test conditions/comments column
Needs appropriate capacitor at
higher inductance values; see the
Driving Inductive Loads section
Settling Time
4 mA to 20 mA, Full-Scale Step
8.5
µs
250 Ω load
4 mA to 20 mA, 120 µA Step
1.2
µs
250 Ω load
DC PSRR
1
µA/V
Output Impedance
130
MΩ
Leakage Current
−12
+12
nA
Output disabled; leakage to ground
VOUT/VSENSE− Error
0.9994
1.0006
Gain
Error in VOUT voltage due to changes
in VSENSE−; specified as gain, for
example, if VSENSE− moves by 1 V,
VOUT moves by 0.9994 V
DIGITAL INPUT
JEDEC compliant
Input High Voltage, VIH
2
V
Input Low Voltage, VIL
0.8
V
Input Current
−1
+1
µA
Per pin
Pin Capacitance
5
pF
Per pin
DIGITAL OUTPUTS3
FAULT, IFAULT, TEMP, VFAULT
Output Low Voltage, VOL
0.4
V
10 kΩ pull-up resistor to DVCC
0.6
V
At 2.5 mA
Output High Voltage, VOH
3.6
V
10 kΩ pull-up resistor to DVCC
SDO
Output Low Voltage, VOL
0.5
0.5
V
Sinking 200 µA
Output High Voltage, VOH
DVCC − 0.5
DVCC − 0.5
V
Sourcing 200 µA
High Impedance Output Capacitance
3
pF
High Impedance Leakage Current
−1
+1
µA
POWER REQUIREMENTS
AVDD
12
24
V
±10%
AVSS
−12
−24
V
±10%
DVCC
Input Voltage
2.7
5.5
V
AIDD
4.4
5.6
mA
Output unloaded, output disabled,
R3, R2, R1, R0 = 0, 1, 0, 1; RSET = 0
5.2
6.2
mA
Current output enabled
5.2
6.2
mA
Voltage output enabled
AISS
2.0
2.5
mA
Output unloaded, output disabled,
R3, R2, R1, R0 = 0, 1, 0, 1; RSET = 0,
AD5750 and AD5750-1
2.0
3.5
mA
AD5750-2
2.5
3
mA
Current output enabled
2.5
3
mA
Voltage output enabled
DICC
0.3
1
mA
VIH = DVCC, VIL = GND
Power Dissipation
108
mW
AVDD/AVSS = ±24 V, outputs unloaded
1
Temperature range: −40°C to +105°C; typical at +25°C.
2
Specification includes gain and offset errors over temperature and drift after 1000 hours, TA = 125°C.
3
Guaranteed by characterization, but not production tested.


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