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74HCT4053BQ Fiches technique(PDF) 6 Page - NXP Semiconductors |
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74HCT4053BQ Fiches technique(HTML) 6 Page - NXP Semiconductors |
6 / 32 page 74HC_HCT4053 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 13 December 2011 6 of 32 NXP Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer [3] For SO16 packages: above 70 C the value of P tot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 C the value of P tot derates linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 C the value of P tot derates linearly with 4.5 mW/K. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions 74HC4053 74HCT4053 Unit Min Typ Max Min Typ Max VCC supply voltage see Figure 7 and Figure 8 VCC GND 2.0 5.0 10.0 4.5 5.0 5.5 V VCC VEE 2.0 5.0 10.0 2.0 5.0 10.0 V VI input voltage GND - VCC GND - VCC V VSW switch voltage VEE -VCC VEE -VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC =6.0 V - - 83 - - - ns/V VCC = 10.0 V - - 31 - - - ns/V Fig 7. Guaranteed operating area as a function of the supply voltages for 74HC4053 Fig 8. Guaranteed operating area as a function of the supply voltages for 74HCT4053 VCC − VEE (V) 010 8 46 2 001aad545 4 6 2 8 10 0 operating area VCC − GND (V) VCC − VEE (V) 010 8 46 2 001aad546 4 6 2 8 10 0 VCC − GND (V) operating area |
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