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AD5116 Fiches technique(PDF) 11 Page - Analog Devices |
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AD5116 Fiches technique(HTML) 11 Page - Analog Devices |
11 / 24 page Data Sheet AD5111/AD5113/AD5115 Rev. 0 | Page 11 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD5111/ AD5113/ AD5115 3 W 4 B 1 VDD 2 A 6 CLK 5 GND TOP VIEW (Not to Scale) 8 CS 7 U/D NOTES 1. THE EXPOSED PAD IS INTERNALLY FLOATING. Figure 5. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 VDD Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors. 2 A Terminal A of RDAC. GND ≤ VA ≤ VDD. 3 W Wiper Terminal of RDAC. GND ≤ VW ≤ VDD. 4 B Terminal B of RDAC. GND ≤ VB ≤ VDD. 5 GND Ground Pin, Logic Ground Reference. 6 CLK Clock Input. Each clock pulse executes the step-up or step-down of the resistance. The direction is determined by the state of the U/D pin. CLK is a negative edge trigger. Data can be transferred at rates up to 50 MHz. 7 U/D Up/Down Selection Counter Control. 8 CS Chip Select. Active Low. EPAD Exposed Pad. The exposed pad is internally floating. |
Numéro de pièce similaire - AD5116 |
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Description similaire - AD5116 |
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