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SI52147-A01AGM Fiches technique(PDF) 1 Page - Silicon Laboratories |
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SI52147-A01AGM Fiches technique(HTML) 1 Page - Silicon Laboratories |
1 / 22 page Preliminary Rev. 0.1 12/11 Copyright © 2011 by Silicon Laboratories Si52147 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si52147 PCI-E XPRESS G EN 1, G EN 2, & G EN 3 N INE O UTPUT C LOCK G ENERATOR Features Applications Description The Si52147 is a spread-controlled PCIe clock generator that can source nine PCIe clocks simultaneously. The device has six hardware output enable control inputs for enabling the respective differential outputs on the fly while powered on along with the hardware spread control for EMI reduction. Functional Block Diagram PCI-Express Gen 1, Gen 2, & Gen 3 compliant Low power push-pull type differential output buffers Integrated resistors on differential clocks Output enable pin for all clocks Hardware selectable spread control Nine PCI-Express clocks 25 MHz crystal input or clock input I2C support with readback capabilities Triangular spread spectrum profile for maximum electromagnetic interference (EMI) reduction Industrial temperature: –40 to 85 oC 3.3 V power supply 48-pin QFN package Network attached storage Multi-function printer Wireless access point Routers Control RAM Control & Memory XIN/CLKIN XOUT SCLK SDATA OE [8:0] CKPWRGD/PDB SSON PLL1 (SSC) Divider DIFF0 DIFF1 DIFF2 DIFF3 DIFF4 DIFF5 DIFF6 DIFF7 DIFF8 Patents pending Ordering Information: See page 20. Pin Assignments VDD VDD OE0 1 OE1 1 VSS_PLL3 VSS_PLL4 OE2 1 SSON 2 1 2 3 4 5 6 7 8 48 47 46 45 44 43 42 41 OE3 1 OE[4:5] 1 OE[6:8] 1 VDD 9 10 11 12 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 36 35 34 33 32 31 30 29 28 27 26 25 DIFF8 DIFF8 VDD DIFF7 DIFF6 DIFF6 VDD DIFF7 DIFF5 DIFF5 DIFF4 DIFF4 Notes: 1. Internal 100 kohm pull-up. 2. Internal 100 kohm pull-down. 49 GND |
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