Moteur de recherche de fiches techniques de composants électroniques |
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TPS54362 Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS54362 Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 35 page TPS54362-Q1, TPS54362A-Q1 www.ti.com SLVS845D – MARCH 2009 – REVISED OCTOBER 2011 DC ELECTRICAL CHARACTERISTICS VIN = 7V to 48V, EN=VIN, TJ = –40°C to 150°C (unless otherwise noted) TEST PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ENABLE (EN) PT VIL Low input threshold 0.7 V PT VIH High input threshold 1.7 V EN = 60V 100 135 μA PT Ilkg Leakage into EN terminal EN = 12V 8 15 μA RESET DELAY (Cdly) External capacitor charge PT IO EN = high 1.4 2 2.6 μA current PT VThreshold Switching threshold Output voltage in regulation 2 V LOW POWER MODE (LPM) PT VIL Low input threshold VIN = 12V 0.7 V PT VIH High input threshold VIN = 12V 1.7 V PT Ilkg Leakage into LPM terminal LPM = 5V 65 95 μA RESET OUTPUT (RST) PT trdly POR delay timer Based on Cdly capacitor, Cdly = 4.7nF 3.6 7 ms PT RST_TH Reset threshold for VReg Check RST output 00.768 0.832 V PT tnRSTdly Filter time Delay before RST is asserted low 10 20 35 μs SOFT START (SS) PT ISS Soft-start source current 40 50 60 μA SYNCHRONIZATION (SYNC)(1) PT VSYNC VIL 0.7 V PT VIH 1.7 V PT Ilkg Leakage SYNC = 5V 65 95 μA VIN= 12 V, Vreg = 5 V, CT SYNC Input clock 180 2200 kHz fsw < fext < 2 × fsw Info SYNCtrans Ext clock to internal clock No external clock, VIN = 12 V, VReg = 5 V 32 μs External clock = 1 MHz, VIN = 12 V, Info SYNCtrans Int clock to external clock 2.5 μs VReg = 5 V CT SYNCCLK Min duty cycle 30% CT SYNCCLK Max duty cycle 70% Rslew CT IRslew Rslew = 50k 20 μA CT IRslew Rslew = 10k 100 μA OVERVOLTAGE SUPERVISORS (OV_TH) Threshold for VReg during Internal Switch is turned OFF 0.768 0.832 V OV PT OV_TH Internal pull down on Vreg, with VReg = 5V 70 mA OV_TH = 1V THERMAL SHUTDOWN Thermal shutdown junction CT TSD 175 °C temperature CT THYS Hysteresis 30 °C PT: Production Tested CT: Characterization Tested Only, NOT Production Tested (1) The SYNC input clock can have a maximum frequency of 2X the programmed clock frequency up to a maximum value of 1.1MHz. Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s) :TPS54362-Q1 TPS54362A-Q1 |
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