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932S805CGLF Fiches technique(PDF) 11 Page - Integrated Device Technology |
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932S805CGLF Fiches technique(HTML) 11 Page - Integrated Device Technology |
11 / 19 page ICS932S805C K8 Clock Chip for Serverworks HT2100 Servers 11 IDT® K8 Clock Chip for Serverworks HT2100 Servers 1131D – 05/04/10 SMBus Table: CPU/SRC Spread Spectrum Control Register Pin # Name Control Function Type0 1PWD Bit 7 Reserved Reserved R - - 0 Bit 6 SSP14 RW X Bit 5 SSP13 RW X Bit 4 SSP12 RW X Bit 3 SSP11 RW X Bit 2 SSP10 RW X Bit 1 SSP9 RW X Bit 0 SSP8 RW X SMBus Table: SRC Spread Spectrum Control Register Pin # Name Control Function Type0 1PWD Bit 7 Reserved Reserved R - - 0 Bit 6 Reserved Reserved R - - 0 Bit 5 Reserved Reserved R - - 0 Bit 4 Reserved Reserved R - - 0 Bit 3 Reserved Reserved R - - 0 Bit 2 Reserved Reserved R - - 0 Bit 1 Reserved Reserved R - - 0 Bit 0 Reserved Reserved R - - 0 SMBus Table: Programmable Output Divider Register Pin # Name Control Function Type0 1PWD Bit 7 CPUDiv3 RW X Bit 6 CPUDiv2 RW X Bit 5 CPUDiv1 RW X Bit 4 CPUDiv0 RW X Bit 3 Reserved Reserved R - - 0 Bit 2 Reserved Reserved R - - 0 Bit 1 Reserved Reserved R - - 0 Bit 0 Reserved Reserved R - - 0 SMBus Table: Programmable Output Divider Register Pin # Name Control Function Type0 1PWD Bit 7 33MHzDiv3 RW X Bit 6 33MHzDiv2 RW X Bit 5 33MHzDiv1 RW X Bit 4 33MHzDiv0 RW X Bit 3 SRC_Div3 RW X Bit 2 SRC_Div2 RW X Bit 1 SRC_Div1 RW X Bit 0 SRC_Div0 RW X SMBusTable: Reserved Regsiter Byte 21 is reserved do not write this register! - - - - Byte 18 Byte 18 - - - - - - - - - Byte 19 - - - - - - - - - - Byte 20 - - - - - - - - - 33MHz Divider Ratio Programming Bits 33MHz Divider Ratio Table See CPU Divider Ratios Table Spread Spectrum Programming bit(14:8) SRC Divider Ratio Table CPU Divider Ratio Programming Bits SRC_ Divider Ratio Programming Bits These Spread Spectrum bits in Byte 17 and 18 will program the spread pecentage of CPU and SRC outputs. |
Numéro de pièce similaire - 932S805CGLF |
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Description similaire - 932S805CGLF |
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