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9DB1200CGLF Fiches technique(PDF) 1 Page - Integrated Device Technology |
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9DB1200CGLF Fiches technique(HTML) 1 Page - Integrated Device Technology |
1 / 14 page 9DB1200C IDT® Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM 1414F—06/30/10 Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM DATASHEET 1 General Description Output Features The ICS9DB1200 is an Intel DB1200 Differential Buffer Specification device. This buffer provides 12 differential clocks at frequencies ranging from 100MHz to 400 MHz. The ICS9DB1200 is driven by a differential output from a CK410B+ or CK509B main clock generator. • 12 - 0.7V current-mode differential output pairs. • Supports zero delay buffer mode and fanout mode. • Bandwidth programming available. • 100-400 MHz operation in PLL mode • 33-400 MHz operation in Bypass mode Functional Block Diagram Key Specifications • Output cycle-cycle jitter < 50ps. • Output to output skew: 50ps • Phase jitter: PCIe Gen2 < 3.1ps rms • Phase jitter: QPI < 0.5ps rms • 64-pin TSSOP Package • Available in RoHS compliant packaging Features/Benefits • 3 selectable SMBus addresses for easy system expansion • Spread spectrum modulation tolerant, 0 to -0.5% down spread and +/- 0.25% center spread • Supports undriven differential outputs in Power Down Mode for power management. Description DB1200 Rev 2.0 Intel Yellow Cover Device SRC_IN SRC_IN# DIF(11:0)) CONTROL LOGIC BYPASS#/PLL SMBDAT SMBCLK VTTPWRGD#/PD SPREAD COMPATIBLE PLL 12 IREF OE_(11:0)# 12 FS(2:0) HIGH_BW# M U X ADR_SEL |
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