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SI1551DL Fiches technique(PDF) 2 Page - Vishay Siliconix |
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SI1551DL Fiches technique(HTML) 2 Page - Vishay Siliconix |
2 / 5 page Vishay Siliconix SPICE Device Model Si1551DL SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Symbol Test Condition Simulated Data Measured Data Unit Static VDS = VGS, ID = 250 µA N-Ch 1.1 Gate Threshold Voltage VGS(th) VDS = VGS, ID = −250 µA P-Ch 1.1 V VDS ≥ 5 V, VGS = 4.5 V N-Ch 1.1 On-State Drain Current a ID(on) VDS ≤ −5 V, VGS = − 4.5 V P-Ch 3.1 A VGS = 4.5 V, ID = 0.29 A N-Ch 1.64 1.55 VGS = −4.5 V, ID = − 0.41 A P-Ch 0.85 0.85 VGS = 2.7 V, ID = 0.1 A N-Ch 2.34 2.8 VGS = −2.7 V, ID = − 0.25 A P-Ch 1.2 1.23 VGS = 2.5 V, ID = 0.1 A N-Ch 2.6 3 Drain-Source On-State Resistance a rDS(on) VGS = −2.5 V, ID = − 0.25 A P-Ch 1.33 1.4 Ω VDS = 10 V, ID = 0.29 A N-Ch 0.33 0.30 Forward Transconductance a gfs VDS = −10 V, ID = − 0.41 A P-Ch 0.80 0.80 S IS = 0.23 A, VGS = 0 V N-Ch 0.67 0.80 Diode Forward Voltage a VSD IS = −0.23 A, VGS = 0 V P-Ch −0.76 −0.80 V Dynamic b N-Ch 0.55 0.72 Total Gate Charge Qg P-Ch 0.52 0.52 N-Ch 0.22 0.22 Gate-Source Charge Qgs P-Ch 0.11 0.11 N-Ch 0.13 0.13 Gate-Drain Charge Qgd N-Channel VDS = 10 V, VGS = 4.5 V, ID = 0.29 A P-Channel VDS = −10 V, VGS = −4.5 V, ID = −0.41 A P-Ch 0.14 0.14 nC N-Ch 18 23 Turn-On Delay Time td(on) P-Ch 8.8 7.5 N-Ch 21 30 Rise Time tr P-Ch 11 20 N-Ch 21 10 Turn-Off Delay Time td(off) P-Ch 11 8.5 N-Ch 22 15 Fall Time tf N-Channel VDD =10V, RL = 20 Ω ID ≅ 0.50 A, VGEN = 4.5 V, RG = 6 Ω P-Channel VDD = −10 V, RL = 20 Ω ID ≅ −0.50 A, VGEN = −4.5 V, RG = 6 Ω P-Ch 12 12 IS = 0.23 A, di/dt = 100 A/µs N-Ch 20 20 Source-Drain Reverse Recovery Time trr IS = −0.23 A, di/dt = 100 A/µs P-Ch 25 25 ns Notes a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2. b. Guaranteed by design, not subject to production testing. 2 www.vishay.com Document Number: 71505 S-50232 Rev. B, 28-Feb-05 |
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