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TPS7A3401DGNR Fiches technique(PDF) 11 Page - Texas Instruments

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No de pièce TPS7A3401DGNR
Description  -20-V, -200-mA, Low-Noise NEGATIVE VOLTAGE REGULATOR
Download  18 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS7A3401DGNR Fiches technique(HTML) 11 Page - Texas Instruments

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P
=(V
V
)I
-
D
IN
OUT
OUT
TPS7A3401
www.ti.com
SBVS163
– JUNE 2011
LAYOUT
PACKAGE MOUNTING
complete design (including heatsink), increase the
ambient temperature until the thermal protection is
Solder
pad
footprint
recommendations
for
the
triggered; use worst-case loads and signal conditions.
TPS7A3401 are available at the end of this product
For good reliability, thermal protection should trigger
datasheet and at www.ti.com.
at least +35
°C above the maximum expected ambient
condition
of
your
particular
application.
This
BOARD LAYOUT RECOMMENDATIONS TO
configuration
produces
a
worst-case
junction
IMPROVE PSRR AND NOISE PERFORMANCE
temperature of +125
°C at the highest expected
ambient temperature and worst-case load.
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that
The internal protection circuitry of the TPS7A3401
the board be designed with separate ground planes
has been designed to protect against overload
for IN and OUT, with each ground plane connected
conditions. It was not intended to replace proper
only at the GND pin of the device. In addition, the
heatsinking. Continuously running the TPS7A3401
ground connection for the output capacitor should
into thermal shutdown degrades device reliability.
connect directly to the GND pin of the device.
POWER DISSIPATION
Equivalent series inductance (ESL) and equivalent
series resistance (ESR) must be minimized in order
The ability to remove heat from the die is different for
to maximize performance and ensure stability. Every
each
package
type,
presenting
different
capacitor (CIN, COUT, CBYP) must be placed as close
considerations in the PCB layout. The PCB area
as possible to the device and on the same side of the
around the device that is free of other components
printed circuit board (PCB) as the regulator itself.
moves the heat from the device to the ambient air.
Using heavier copper increases the effectiveness in
Do not place any of the capacitors on the opposite
removing heat from the device. The addition of plated
side of the PCB from where the regulator is installed.
through-holes to heat dissipating layers also improves
The
use
of
vias
and
long
traces
is
strongly
the heatsink effectiveness.
discouraged
because
they
may
impact
system
performance negatively and even cause instability.
Power dissipation depends on input voltage and load
conditions. Power dissipation (PD) is equal to the
If possible, and to ensure the maximum performance
product of the output current times the voltage drop
denoted in this product data sheet, use the same
across the output pass element, as shown in
layout pattern used for the TPS7A30 evaluation
Equation 2:
board, available at www.ti.com.
(2)
THERMAL PROTECTION
SUGGESTED LAYOUT AND SCHEMATIC
Thermal protection disables the output when the
junction temperature rises to approximately +170
°C,
Layout is a critical part of good power-supply design.
allowing the device to cool. When the junction
There
are
several
signal
paths
that
conduct
temperature cools to approximately +150
°C, the
fast-changing currents or voltages that can interact
output circuitry is enabled. Depending on power
with stray inductance or parasitic capacitance to
dissipation,
thermal
resistance,
and
ambient
generate
noise
or
degrade
the
power-supply
temperature, the thermal protection circuit may cycle
performance. To help eliminate these problems, the
on and off. This cycling limits the dissipation of the
IN pin should be bypassed to ground with a low ESR
regulator, protecting it from damage as a result of
ceramic bypass capacitor with an X5R or X7R
overheating.
dielectric.
Any tendency to activate the thermal protection circuit
The GND pin should be tied directly to the PowerPAD
indicates
excessive
power
dissipation
or
an
under the IC. The PowerPAD should be connected to
inadequate heatsink. For reliable operation, junction
any internal PCB ground planes using multiple vias
temperature should be limited to a maximum of
directly under the IC.
+125
°C. To estimate the margin of safety in a
Copyright
© 2011, Texas Instruments Incorporated
11


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