Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

ADP151AUJZ-1.5-R7 Fiches technique(PDF) 5 Page - Analog Devices

No de pièce ADP151AUJZ-1.5-R7
Description  Ultralow Noise, 200 mA, CMOS Linear Regulator
Download  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADP151AUJZ-1.5-R7 Fiches technique(HTML) 5 Page - Analog Devices

  ADP151AUJZ-1.5-R7 Datasheet HTML 1Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 2Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 3Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 4Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 5Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 6Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 7Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 8Page - Analog Devices ADP151AUJZ-1.5-R7 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 24 page
background image
ADP151
Rev. D | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
VIN to GND
−0.3 V to +6.5 V
VOUT to GND
−0.3 V to VIN
EN to GND
−0.3 V to +6.5V
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Operating Ambient Temperature Range
−40°C to +125°C
Soldering Conditions
JEDEC J-STD-020
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP151 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
The maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
formula
TJ = TA + (PD × θJA)
The junction-to-ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit
board. See JESD51-7 and JESD51-9 for detailed information
on the board construction. For additional information, see the
AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale
Package, available at www.analog.com.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information, states
that thermal characterization parameters are not the same as
thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
TJ = TB + (PD × ΨJB)
See JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
ΨJB
Unit
5-Lead TSOT
170
43
°C/W
4-Ball, 0.4 mm Pitch WLCSP
260
58
°C/W
6-Lead 2 mm × 2 mm LFCSP
63.6
28.3
°C/W
ESD CAUTION


Numéro de pièce similaire - ADP151AUJZ-1.5-R7

FabricantNo de pièceFiches techniqueDescription
logo
Analog Devices
ADP151AUJZ-1.5-R7 AD-ADP151AUJZ-1.5-R7 Datasheet
540Kb / 24P
   Ultralow Noise,200 mA, CMOS Linear Regulator
REV. 0
ADP151AUJZ-1.5-R7 AD-ADP151AUJZ-1.5-R7 Datasheet
561Kb / 24P
   Ultralow Noise, 200 mA, CMOS Linear Regulator
Rev. E
More results

Description similaire - ADP151AUJZ-1.5-R7

FabricantNo de pièceFiches techniqueDescription
logo
Analog Devices
ADP151 AD-ADP151 Datasheet
540Kb / 24P
   Ultralow Noise,200 mA, CMOS Linear Regulator
REV. 0
ADP151CB-3.3-EVALZ AD-ADP151CB-3.3-EVALZ Datasheet
561Kb / 24P
   Ultralow Noise, 200 mA, CMOS Linear Regulator
Rev. E
ADM7160 AD-ADM7160 Datasheet
844Kb / 24P
   Ultralow Noise, 200 mA Linear Regulator
REV. 0
ADP150 AD-ADP150 Datasheet
620Kb / 20P
   Ultralow Noise, 150 mA CMOS Linear Regulator
REV. 0
ADP150_VA AD-ADP150_VA Datasheet
580Kb / 20P
   Ultralow Noise, 150 mA CMOS Linear Regulator
REV. A
ADP150 AD-ADP150_13 Datasheet
603Kb / 20P
   Ultralow Noise, 150 mA CMOS Linear Regulator
REV. B
logo
Texas Instruments
LP5907 TI1-LP5907_16 Datasheet
1Mb / 36P
[Old version datasheet]   Ultralow-Noise, 250-mA Linear Regulator
logo
Analog Devices
ADP7142 AD-ADP7142 Datasheet
1Mb / 23P
   40 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
Rev. H
ADP7118 AD-ADP7118 Datasheet
915Kb / 24P
   20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
ADP7112 AD-ADP7112 Datasheet
584Kb / 21P
   20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
Rev. D
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com