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74AVC16T245 Fiches technique(PDF) 11 Page - NXP Semiconductors |
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74AVC16T245 Fiches technique(HTML) 11 Page - NXP Semiconductors |
11 / 28 page 74AVC16T245 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 9 June 2011 11 of 28 NXP Semiconductors 74AVC16T245 16-bit dual supply translating transceiver; 3-state 10. Dynamic characteristics [1] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi N+ (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (C L VCC 2 f o) = sum of the outputs. [2] fi = 10 MHz; VI =GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = . Table 9. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 C [1][2] Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC(A) = VCC(B) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V CPD power dissipation capacitance A port: (direction nAn to nBn); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pF A port: (direction nAn to nBn); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF A port: (direction nBn to nAn); output enabled 9 9.7 9.8 10.3 11.7 13.7 pF A port: (direction nBn to nAn); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pF B port: (direction nAn to nBn); output enabled 9 9.7 9.8 10.3 11.7 13.7 pF B port: (direction nAn to nBn); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pF B port: (direction nBn to nAn); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pF B port: (direction nBn to nAn); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF |
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