No. 4374-2/7

STK311-010

Parameter

Symbol

Conditions

min

typ

max

Unit

Quiescent current

26

38

mA

Band-pass filter gain

f = 57 Hz

9

12.5

17

dB

f = 60 kHz (57 kHz = 0 dB)

–6

–2.5

0

dB

Band-pass filter selectivity

f = 54 kHz (57 kHz = 0 dB)

–6

–3.5

0

dB

f = 38 kHz (57 kHz = 0 dB)

–39

–33

dB

PLL capture range

CR

5 mVrms, CW input

–0.9

%

+1.5

%

RDS detection seisitivity

4 pin input voltage which sets 12 pin to low

0.4

1.0

mVrms

SK detection seisitivity

4 pin input voltage which sets 11 pin to low

1.0

2.0

mVrms

DK detection seisitivity

4 pin input voltage which sets 10 pin to low

1.7

2.6

mVrms

4 pin maximum input signal (ARI + RDS)

RDS input dynamic range

which sets 12 pin to low

30

50

mVrms

DK input dynamic range

4 pin maximum input signal (ARI)

75

100

mVrms

which sets 10 pin to low

VCO free-run frequency

453

456

459

kHz

Output high level voltage

V

V

Output low level voltage

1.5

V

0.4

V

Ceramic oscillator stability time

Refer to Figure 1

10

ms

Reset time

Refer to Figure 2

Note: 1. DATA START, DATA OUT, CLOCK OUT

2. RECEIVE, CORRECTION, ERROR, DATA START, DATA OUT, CLOCK OUT

Note: STK311-010 defaults to setting 1 though other settings are supported.

Other

The STK311-010 supports HIC internal settings for all output signals of CLK OUT and DATA START. These are

shown in the following table.

Table 1 Output Signal Settings

Setting

Polarity of CLK OUT

DATA START Output

1

Negative edge trigger

Every block

2

Negative edge trigger

Only 2nd block

3

Positive edge trigger

Every block

4

Positive edge trigger

Only 2nd block