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FFPF10H60S Fiches technique(PDF) 3 Page - Fairchild Semiconductor

No de pièce FFPF10H60S
Description  Power Factor Correction Converter Design
Download  15 Pages
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FFPF10H60S Fiches technique(HTML) 3 Page - Fairchild Semiconductor

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AN-6982
APPLICATION NOTE
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.0 • 6/8/10
3
IREF
IAC
IIN
VEAO
VBOUT
BW<<Twice Line Frequency
IREF
IAC
IIN
VEAO
VBOUT
BW
Twice Line Frequency
Figure 5. Control Bandwidth and Inductor Current
Line Feed-Forward
Since rectified line voltage provides the sinusoidal
reference for the input current shaping of the current-
control loop, the increase of the line voltage causes
increase of input current. However, from an input and
output power balance point of view, input current should
be reduced when input voltage increases to keep input
power same. When the error amplifier has adequate
bandwidth, as in most DC-DC applications, it is able to
maintain regulation within a tolerable output voltage range
during input voltage changes. However, for PFC
applications,
some
severe
output
voltage
overshoot/undershoot is unavoidable during line transient
due to the narrow bandwidth of output regulation control
loop.
One measure to address this issue is line feed-forward,
which changes the gain of the gain modulator as inversely
proportional to the RMS value of line voltage, as shown in
Figure 6. This negates the effect of input voltage variations
on the output voltage and eliminates the need for any
correction by the error amplifier, as shown in Figure 7.
The second benefit of line feed-forward is that the output
of the error amplifier becomes directly proportional to the
input power of the converter, independently of line voltage
variation. This makes the control-to-output transfer
function independent of line voltage and simplifies control
loop design.
V
RMS
V
RMS-UVP
2
1
RMS
G
V
Figure 6. Modulation Gain Characteristics
IREF
IAC
IIN
VEAO
Figure 7. Effect of Line Feed-Forward
Line Voltage Sensing
Since FAN6982 uses line voltage information for line feed-
forward and brownout protection, the RMS value of line
voltage should be sensed. To sense the RMS value of the
line voltage, an averaging circuit with two poles is
typically employed, as shown in Figure 3. The voltage of
VRMS pin in normal PFC operation is given as:
3
12
3
2
2
π
=
++
RMS
RMS
LINE
RMS
RMS
RMS
R
VV
RR
R
(3)
where VLINE is RMS value of line voltage.
Once PFC stops switching operation, the junction
capacitance of bridge diode and input bypass capacitor are
not discharged and VIN of Figure 3 is clamped at the peak
of the line voltage as illustrated in Figure 8. Then, the
voltage of VRMS pin is given by:
3
12
3
2
NS
RMS
RMS
LINE
RMS
RMS
RMS
R
VV
RR
R
=
++
(4)
Therefore, the voltage divider for VRMS should be
designed considering the brownout protection trip point
and PFC startup threshold (1.05V/1.9V).


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